EP7309-CR Cirrus Logic Inc, EP7309-CR Datasheet - Page 13

32-Bit Microcontroller IC

EP7309-CR

Manufacturer Part Number
EP7309-CR
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of EP7309-CR

Controller Family/series
(ARM7)
Core Size
32 Bit
No. Of Timers 8/12/16/32 Bits
0 / 0 / 2 / 0
Interface
SSI, UART
Embedded Interface Type
SSI, UART
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP7309-CR
Manufacturer:
AGERE
Quantity:
3 120
Part Number:
EP7309-CR
Manufacturer:
CIRRUSLOGIC
Quantity:
20 000
DS507F1
CI/O
IDD
at 74 MHz
VDD
IDD
IDD
IDD
Symbol
@ 25 C
@ 70 C
@ 85 C
idle
a.
b.
c.
STANDBY
STANDBY
STANDBY
STANDBY
Note:
Transceiver capacitance
Standby current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
Standby current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
Standby current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
Idle current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
Standby supply voltage
1) Total power consumption = IDD
2) A typical design will provide 3.3 V to the I/O supply (i.e., V
2) Pull-up current = 50 µA typical at V
Refer to the strength column in the pin assignment tables for all package types.
Assumes buffer has no pull-up or pull-down resistors.
The leakage value given assumes that the pin is configured as an input pin but is not currently being driven.
compatible with 3.3 V powered external logic (i.e., 3.3 V SDRAMs).
Parameter
1
1
1
1
CORE
©
DD
Min
Copyright Cirrus Logic, Inc. 2005
2.0
x 2.5 V + IDD
8
-
-
-
-
-
-
-
-
= 3.3 V.
(All Rights Reserved)
IO
Typ
77
41
10
x 3.3 V
6
-
-
-
-
-
-
DDIO
), and 2.5 V to the remaining logic. This is to allow the I/O to be
Max
1693
10.0
570
111
163
-
-
-
-
-
High-Performance, Low-Power System on Chip
Unit
mA
pF
µA
µA
µA
V
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
are driven, while all other float,
VIH = V
VIL = GND ± 0.1 V
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
are driven, while all other float,
VIH = V
VIL = GND ± 0.1 V
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
are driven, while all other float,
VIH = V
VIL = GND ± 0.1 V
Both oscillators running, CPU
static, Cache enabled, LCD
disabled, VIH = V
= GND ± 0.1 V
Minimum standby voltage for
state retention, internal SRAM
cache, and RTC operation only
DD
DD
DD
Conditions
± 0.1 V,
± 0.1 V,
± 0.1 V,
DD
± 0.1 V, VIL
EP7309
13

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