HCS500/P Microchip Technology, HCS500/P Datasheet - Page 15
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HCS500/P
Manufacturer Part Number
HCS500/P
Description
IC,Remote-Control Receiver/Decoder,CMOS,DIP,8PIN
Manufacturer
Microchip Technology
Type
Code Hopping Decoderr
Specifications of HCS500/P
Applications
Remote Secure Access, Keyless Entry
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCS500/P
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
HCS500/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
5.0
The decoder uses a 2K, 24LC02B serial EEPROM. The memory is divided between system memory that stores the
transmitter information (read protected) and user memory (read/write). Commands to access the user memory are
described in Sections 4.2.5 and 4.2.6.
The following information stored in system memory needs to be programmed before the decoder can be used:
• 64-bit manufacturer’s code
• Decoder configuration byte
5.1
The decoder is configured during initialization by setting the appropriate bits in the configuration byte. The following table
list the options:
5.1.1
LRN_MODE selects between two learning modes. With LRN_MODE = 0, the Normal (serial number derived) mode is
selected; with LRN_MODE=1, the Secure (seed derived) mode is selected. See Section 6.0 for more detail on learning
modes.
5.1.2
LRN_ALG selects between the two available algorithms. With LRN_ALG = 0, is selected the K
algorithm is selected; with LRN_ALG = 1, the XOR algorithm is selected. See Section 6.0 for more detail on learning
algorithms.
5.1.3
The HCS500 can be configured to indicate repeated transmissions. In a stand-alone configuration, repeated transmis-
sions must be disabled.
2002 Microchip Technology Inc.
Note 1: These memory locations are read protected and can only be written to using the program command with
Bit
0
1
2
3
4
5
6
7
DECODER PROGRAMMING
Configuration Byte
2: The contents of the system memory is encrypted by a unique 64-bit key that is stored in the HCS500. To
LRN_MODE
LRN_ALG
REPEAT
the device powered up.
initialize the system memory, the HCS500’s program command must be used. The EEPROM and HCS500
are matched, and the devices must be kept together. In-circuit programming is therefore recommended.
LRN_MODE
Mnemonic
LRN_ALG
Not Used
Not Used
Not Used
Not Used
Not Used
REPEAT
Learning mode selection
Algorithm selection
Repeat Transmission enable
Reserved
Reserved
Reserved
Reserved
Reserved
LRN_MODE = 0—Normal Learn
LRN_MODE = 1—Secure Learn
LRN_ALG = 0—K
LRN_ALG = 1—XOR Algorithm
0 = Disable
1 = Enabled
EE
L
OQ
Decryption Algorithm
Description
HCS500
DS40153C-page 15
EE
L
OQ
decryption