KS8721B Micrel Inc, KS8721B Datasheet
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KS8721B
Specifications of KS8721B
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KS8721B Summary of contents
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... The KS8721B/BT can automatically confi gure itself for 100 or 10 Mbps and full or half duplex operation, using on-chip Auto-Negotiation algorithm ideal choice of physical layer transceiver for 100BaseTX/10BaseT applications ...
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... Commercial temperature range: 0°C to +70°C • Industrial temperature range: –40°C to +85°C • Available in 48-pin SSOP and TQFP Ordering Information Part Number Standard Pb-Free KS8721B KSZ8721B KS8721BT KSZ8721BT — KSZ8721BI M9999-030106 Temperature Package 0°C to +70°C 48-Pin SSOP 0° ...
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... Add 48 TQFP pinout diagram & RMII AC Charateristics Add 48 TQFP pinout diagram & RMII AC Charateristics Add ordering info for 48 Pin TQFP package, KS8721B/BTI industrial temperature, KSY8721B/KSY8721BT Add ordering info for 48 Pin TQFP package, KS8721B/BTI industrial temperature, KSY8721B/KSY8721BT Add ordering info for 48 Pin TQFP package, KS8721B/BTI industrial temperature, KSY8721B/KSY8721BT ...
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Table Of Contents Pin Description .............................................................................................................................................................6 Strapping Option ...........................................................................................................................................................9 Pin Confi guration ........................................................................................................................................................10 Introduction ............................................................................................................................................................ 11 100BaseTX Transmit ............................................................................................................................................. 11 100BaseTX Receive ............................................................................................................................................. 11 PLL Clock Synthesizer .......................................................................................................................................... PLL Clock Synthesizer .......................................................................................................................................... PLL Clock Synthesizer Scrambler/De-scrambler (100BaseTX only) ......................................................................................................... 11 ...
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Absolute Maximum Ratings .......................................................................................................................................22 Operating Ratings .......................................................................................................................................................22 Electrical Characteristics ...........................................................................................................................................22 Timing Diagrams .........................................................................................................................................................24 Selection of Isolation Transformers ..........................................................................................................................30 Selection of Reference Crystals ................................................................................................................................30 Package Outline and Dimensions .............................................................................................................................31 March 2006 5 M9999-030106 ...
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Pin Description Pin Number Pin Number Pin Number Pin Name Pin Name Pin Name Type Type Type MDIO MDIO MDIO MDIO MDIO MDC MDC MDC MDC MDC ...
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Pin Number Pin Number Pin Number Pin Name Pin Name Pin Name Type Type Type INT#/ INT#/ INT#/ INT#/ INT#/ Ipu/O Ipu/O Ipu/O Ipu/O Ipu/O PHYAD0 PHYAD0 PHYAD0 PHYAD0 PHYAD0 ...
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Pin Number Pin Number Pin Number Pin Name Pin Name Pin Name Type Type Type REXT REXT REXT REXT REXT VDDRCV VDDRCV VDDRCV VDDRCV VDDRCV ...
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Strapping Options Pin Number Pin Number Pin Number Pin Name Pin Name Pin Name Type Type Type 6,5, 6,5, 6,5, 6,5, 6,5, PHYAD[4:1]/ PHYAD[4:1]/ PHYAD[4:1]/ PHYAD[4:1]/ PHYAD[4:1]/ Ipd/O Ipd/O Ipd/O Ipd/O Ipd/O 4,3 4,3 4,3 4,3 4,3 RXD[0:3] ...
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Pin Confi guration MDIO 1 MDC 2 R3D3/PHYAD1 3 RXD2/PHYAD2 4 RXD1/PHYAD3 5 RXD0/PHYAD4 6 VDDIO 7 GND 8 RXDV/PCS_LPBK 9 RXC 10 RXER/ISO 11 GND 12 VDDC 13 TXER 14 TXC/REF_CLK 15 TXEN 16 TXD0 17 TXD1 18 TXD2 ...
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... RX- input from falsely trigger the decoder. When the input exceeds the squelch limit, the PLL locks onto the incoming signal and the KS8721B/BT decodes a data frame. This activates the carrier sense (CRS) ad RXDV signals and makes the receive data (RXD) available. The receive clock is maintained active during idle periods in between data reception. ...
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... Error Signals: Whenever the KS8721B/BT receives an error symbol from the network, it asserts RXER and drives “1110” (4B) on the RXD pins. When the MAC asserts TXER, the KS8721B/BT will drive “H” symbols (a Transmit Error defi the IEEE 802.3 4B/5B code group) out on the line to force signaling errors. ...
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... Collision: Whenever the line state is half-duplex and the transmitter and receiver are active at the same time, the KS8721B/ BT asserts its collision signal, which is asynchronous to any clock. RMII (Reduced MII) Data Interface RMII interface specifi low pin count (Reduced) Media Independent Interface (RMII) intended for use between Ethernet PHYs and Switch or Repeater ASICs ...
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Transmit Data [1:0] (TXD[1:0]) Transmit Data TXD[1:0] shall transition synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] are accepted for transmission by the PHY. TXD[1:0] shall be “00” to indicate idle when TX_EN is de-asserted. Values of TXD[1:0] ...
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RMII Receive Timing REF_CLK TXD[1:0] TXEN TXER Parameter REF_CLK Frequency RXD[1:0], CRS_DV, RX_ER Output delay from REF_CLK rising edge RXD[1:0], CRS_DV, RX_ER Output delay from REF_CLK rising edge RXD[1:0], CRS_DV, RX_ER Output delay from REF_CLK rising edge RXD[1:0], CRS_DV, RX_ER ...
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... MAC. FEF can be disabled by strapping pin 27 low. Refer to “Strapping Options” section. Media Converter Operation KS8721B/BT is capable of performing media conversion with 2 parts in a back to back RMII loop-back mode as indicated in the diagram. Both parts are in RMII mode and with RMII BTB asserted (pin 21 and 22 strapped high). One part is operating at TX mode and the other in FX mode ...
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Register Map Register No. Register No. Description Description Basic Control Register Basic Control Register Basic Control Register Basic Status Register Basic Status Register Basic Status Register PHY Identifi PHY ...
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Address Address Address Address Name Name Name Name 1.10:7 1.10:7 1.10:7 1.10:7 1.10:7 1.10:7 Reserved Reserved Reserved Reserved Reserved Reserved 1.6 1.6 1.6 1.6 1.6 1.6 No Preamble No Preamble No Preamble No Preamble No Preamble No Preamble 1.5 1.5 ...
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Address Address Address Address Name Name Name Name 5.11:10 5.11:10 5.11:10 5.11:10 5.11:10 5.11:10 Pause Pause Pause Pause Pause Pause 5.9 5.9 5.9 5.9 5.9 100 BaseT4 100 BaseT4 100 BaseT4 100 BaseT4 100 BaseT4 5.8 5.8 5.8 5.8 5.8 ...
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Address Address Address Address Name Name Name Name Register 15h - RXER Counter Register 15h - RXER Counter 15.15:0 15.15:0 15.15:0 15.15:0 15.15:0 15.15:0 RXER Counter RXER Counter RXER Counter RXER Counter RXER Counter RXER Counter Register 1bh - Interrupt ...
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Address Address Address Address Name Name Name Name 1f.6 1f.6 1f.6 1f.6 1f.6 1f.6 Enable Pause Enable Pause Enable Pause Enable Pause Enable Pause Enable Pause (Flow-Control Result) (Flow-Control Result) (Flow-Control Result) 1f.5 1f.5 1f.5 1f.5 1f.5 PHY Isolate PHY ...
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Absolute Maximum Ratings Supply Voltage ( DDC DD_PLL DD_TX DD_RCV V ) ....................................................–0.5V to +3.0V DD_RX DD_RX DD_RX DD_RX DD_RX ( ......................................................–0.5V to +4.0V DDIO Input Voltage ................................................–0.5V to +4.0V Output ...
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Symbol Symbol Symbol Symbol Symbol Symbol Symbol Parameter Parameter Parameter Parameter Parameter Parameter Parameter 10BaseTX Receive R RX+/RX– Differential RX+/RX– Differential RX+/RX– Differential RX+/RX– Differential RX+/RX– Differential RX+/RX– Differential IN Input Resistance Input Resistance Input Resistance Input Resistance V Squelch ...
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Timing Diagrams TXC TXEN TXD[3:0] CRS TXP/TXM SQE Timing TXC TXEN COL Symbol Symbol Parameter Parameter t TXD [3:0] Set-Up to TXC High TXD [3:0] Set-Up to TXC High TXD [3:0] Set-Up to TXC High TXD [3:0] Set-Up to TXC ...
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TXC TXEN TXD[3:0], TXER CRS TX+/TX- Symbol Symbol Parameter Parameter t TXD [3:0] Set-Up to TXC High TXD [3:0] Set-Up to TXC High TXD [3:0] Set-Up to TXC High TXD [3:0] Set-Up to TXC High TXD [3:0] Set-Up to TXC ...
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RX+/RX- CRS RXDV RXD[3:0] RXER RXC Symbol Symbol Parameter Parameter t RXC Period RXC Period RXC Period RXC Period RXC Period RXC Period P t RXC Pulse Width RXC Pulse Width RXC Pulse Width RXC Pulse Width RXC Pulse Width ...
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TX+/TX- TX+/TX- Figure 7. Auto-Negotiation/Fast Link Pulse Timing Symbol Symbol Parameter Parameter t FLP Burst to FLP Burst FLP Burst to FLP Burst FLP Burst to FLP Burst FLP Burst to FLP Burst FLP Burst to FLP Burst FLP Burst ...
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MDC MDI O (Into Ch ip) MDI O (Out of Chip) Symbol Symbol Parameter Parameter t MDC Period MDC Period MDC Period MDC Period MDC Period MDC Period P t MDIO Set-Up to MDC (MDIO as input) MDIO Set-Up to ...
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... Reset to Strap-In Pin Output rc Reset Circuit Diagram Micrel recommendeds the following discrete reset circuit as shown in Figure 10 when powering up the KS8721B/BT device. For the application where the reset circuit signal comes from another device (e.g., CPU, FPGA, etc), we recommend the reset circuit as shown in Figure 11. ...
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Selection of Isolation Transformer One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common-mode choke is recommended for exceeding FCC requirements. The following table gives recommended transformer character- istics. Characteristics Name Characteristics Name ...
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Package Information March 2006 48-Pin SSOP (SM) 31 M9999-030106 ...
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... MICREL INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 TEL This information furnished by Micrel in this data sheet is believed to be accurate and reliable. However no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifi cations at any time without notifi cation to the customer. ...