KS8721BL Micrel Inc, KS8721BL Datasheet

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... The KS8721BL/SL automatically configures itself for 100 or 10Mbps and full- or half-duplex operation, using an on-chip auto-negotiation algorithm the ideal physical layer transceiver for 100BASE-TX/10BASE-T applications. ...

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... LED outputs for link, activity, full-/half-duplex, collision, and speed • Supports back-to-back for media converter applications • Supports MDI/MDI-X auto-crossover • KS8721BL is a drop-in replacement for the KS8721BT in the same footprint • KS8721SL is a drop-in replacement for the KS8721B in the same footprint • Commercial temperature range +70 C • ...

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... KS8721BL/SL Revision History Revision Date Summary of Changes 0.90 1/12/04 Created. 1.0 3/06/04 Initial release. Change to new format. Add part-ordering information. Editorial changes on pin description, RMII, and media converter operation. Update circuit design, reset timing, thermal resistance, electrical characteristics, and strapping option circuit. ...

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... KS8721BL/SL Table Of Contents Pin Description ............................................................................................................................................................ 6 Strapping Option ......................................................................................................................................................... 9 Pin Configuration ...................................................................................................................................................... 10 Introduction ........................................................................................................................................................... 11 100BASE-TX Transmit ........................................................................................................................................ 11 100BASE-TX Receive ......................................................................................................................................... 11 PLL Clock Synthesizer ......................................................................................................................................... 11 Scrambler/De-scrambler (100BASE-TX only) ..................................................................................................... 11 10BASE-T Transmit ............................................................................................................................................. 11 10BASE-T Receive .............................................................................................................................................. 11 SQE and Jabber Function (10BASE-T only) ....................................................................................................... 11 Auto-Negotiation .................................................................................................................................................. 11 MII Management Interface ................................................................................................................................... 12 MII Data Interface ................................................................................................................................................ 12 Transmit Clock ............................................................................................................................................. 12 Receive Clock .............................................................................................................................................. 12 Transmit Enable ...

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... KS8721BL/SL Register Map (continued) Register 15h: RXER Counter ...................................................................................................................................... 21 Register 1bh: Interrupt Control/Status Register .......................................................................................................... 21 Register 1fh: 100BASE-TX PHY Controller ................................................................................................................ 21 Absolute Maximum Ratings ........................................................................................................................................ 23 Operating Ratings ........................................................................................................................................................ 23 Electrical Characteristics ............................................................................................................................................ 23 Timing Diagrams .......................................................................................................................................................... 25 Selection of Isolation Transformer ............................................................................................................................ 31 Selection of Reference Crystal ................................................................................................................................... 31 Package Information ................................................................................................................................................... 32 May 2004 5 Micrel M9999-051704 ...

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... KS8721BL/SL Pin Description Pin Number Pin Name Type 1 MDIO I/O 2 MDC I 3 RXD3/ Ipd/O PHYAD 4 RXD2/ Ipd/O PHYAD2 5 RXD1/ Ipd/O PHYAD3 6 RXD0/ Ipd/O PHYAD4 7 VDDIO P 8 GND GND 9 RXDV/ Ipd/O CRSDV/ PCS_LPBK 10 RXC O 11 RXER/ISO Ipd/O 12 GND GND 13 VDDC P 14 TXER ...

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... KS8721BL/SL Pin Number Pin Name Type 19 TXD2 Ipd 20 TXD3 Ipd 21 COL/RMII Ipd/O 22 CRS/ Ipd/O RMII_BTB 23 GND GND 24 VDDIO P 25 INT#/ Ipu/O PHYAD0 26 LED0/TEST Ipu/O 27 LED1/ Ipu/O SPD100/ nFEF 28 LED2/ Ipu/O 29 LED3/ Ipu/O NWAYEN 30 PD# Ipu Notes Power supply. GND = Ground Input. ...

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... KS8721BL/SL Pin Number Pin Name Type 31 VDDRX 32 RX- 33 RX+ 34 FXSD/FXEN Ipd/O 35 GND GND 36 GND GND 37 REXT 38 VDDRCV 39 GND GND 40 TX- 41 TX+ 42 VDDTX 43 GND GND 44 GND GND VDDPLL 48 RST# Notes Power supply. GND = Ground Input. I/O = Bidirectional. Ipd = Input w/ internal pull-down. Ipd/O = Input w/ internal pull-down during reset, output pin otherwise. ...

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... KS8721BL/SL (1) Strapping Options Pin Number Pin Name Type 6,5, PHYAD[4:1]/ Ipd/O 4,3 RXD[0:3] 25 PHYAD0/ Ipu/O INT# 9 PCS_LPBK/ Ipd/O RXDV 11 ISO/RXER Ipd/O 21 RMII/COL Ipd/O 22 RMII_BTB Ipd/O CRS 27 SPD100/ Ipu/O No FEF/ LED1 28 DUPLEX/ Ipu/O LED2 29 NWAYEN/ Ipu/O LED3 30 PD# Ipu Notes: 1. Strap-in is latched during power-up or reset. ...

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... KS8721BL/SL Pin Configuration MDIO 1 MDC 2 R3D3/PHYAD1 3 RXD2/PHYAD2 4 RXD1/PHYAD3 5 RXD0/PHYAD4 6 VDDIO 7 GND 8 RXDV/PCS_LPBK 9 RXC 10 RXER/ISO 11 GND 12 VDDC 13 TXER 14 TXC/REF_CLK 15 TXEN 16 TXD0 17 TXD1 18 TXD2 19 TXD3 20 COL/RMII 21 CRS/RMII_BTB 22 GND 23 VDDIO 24 48-Pin SSOP (SM) M9999-051704 48 RST# 47 VDDPLL GND 43 GND 42 VDDTX 41 TX+ 40 TX- 39 GND 38 VDDRCV 37 REXT MDIO ...

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... RX- input from falsely triggering the decoder. When the input exceeds the squelch limit, the PLL locks onto the incoming signal and the KS8721BL/SL decodes a data frame. This activates the carrier sense (CRS) and RXDV signals and makes the receive data (RXD) available. The receive clock is maintained active during idle periods in between data reception. ...

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... When the KS8721BL/SL receives a burst of FLP from its link partner with three identical link code words (ignoring acknowledge bit), it will store these code words in Register 5 and wait for the next three identical code words. Once the KS8721BL/SL detects the second code words, it then configures itself according to the above-mentioned priority. In addition, the KS8721BL/SL also checks for 100BASE-TX idle or 10BASE-T NLP symbols ...

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... For 10BASE-T links, CRS assertion is based on reception of valid preamble, and de-assertion on reception of an end-of-frame (EOF) marker. Collision: Whenever the line state is half-duplex and the transmitter and receiver are active at the same time, the KS8721BL/ SL asserts its collision signal, which is asynchronous to any clock. ...

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... KS8721BL/SL to the RMII. TX_EN is negated prior to the first REF_CLK following the final di-bit of a frame. TX_EN transitions synchronously with respect to REF_CLK. Transmit Data [1:0] (TXD[1:0]) Transmit Data TXD[1:0] transitions synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] are accepted for transmission by the PHY. TXD[1:0] remains as “00” to indicate idle when TX_EN is de-asserted. Values of TXD[1:0] other than “ ...

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... KS8721BL/SL Auto-Crossover (Auto-MDI/MDI-X) Automatic MDI/MDI-X configuration is intended to eliminate the need for crossover cables between similar devices. The assignment of pinouts for a 10/100 BASE-T crossover function cable is shown below. This feature eliminates the confusion in applications by allowing the use of both straight and crossover cables. This feature is controlled by register 1f:13. See “ ...

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... This mode can be disabled by writing to Register 1fh.10. The KS8721BL/SL turns off everything except for the Energy Detect and PLL circuits when the cable is not installed. In other words, the KS8721BL/SL shuts down most of the internal circuits to save power if there is no link. Power-saving mode is in the most effective state when auto-negotiation mode is enabled. ...

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... Circuit Design Reference for Power Supply Micrel’s integrated built-in, voltage regulator technology and thoughtful implementation allows the user to save BOM cost on both existing and future designs with the use of the new KS8721BL/SL single supply, single port 10/100 Ethernet PHY. +3.3V ...

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... KS8721BL/SL Register Map Register No. Description 0h Basic Control Register 1h Basic Status Register 2h PHY Identifier I 3h PHY Identifier II 4h Auto-Negotiation Advertisement Register 5h Auto-Negotiation Link Partner Ability Register 6h Auto-Negotiation Expansion Register 7h Auto-Negotiation Next Page Register 8h Link Partner Next Page Ability 15h RXER Counter Register ...

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... KS8721BL/SL Address Name 1.10:7 Reserved 1.6 No Preamble 1.5 Auto-Negotiation Complete 1.4 Remote Fault 1.3 Auto-Negotiation Ability 1.2 Link Status 1.1 Jabber Detect 1.0 Extended Capability Register 2h - PHY Identifier 1 2.15:0 PHY ID Number Register 3h - PHY Identifier 2 3.15:10 PHY ID Number 3.9:4 Model Number 3.3:0 ...

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... KS8721BL/SL Address Name 5.11:10 Pause 5.9 100 BASE-T4 5.8 100BASE-TX Full-Duplex 5.7 100BASE-TX 5.6 10BASE-T Full-Duplex 5.5 10BASE-T 5.4:0 Selector Field Register 6h - Auto-Negotiation Expansion 6.15:5 Reserved 6.4 Parallel Detection Fault 6.3 Link Partner Next Page Able 6.2 Next Page Able 6.1 Page Received 6 ...

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... KS8721BL/SL Address Name Register 15h - RXER Counter 15.15:0 RXER Counter Register 1bh - Interrupt Control/Status Register 1b.15 Jabber Interrupt Enable 1b.14 Receive Error Interrupt Enable 1b.13 Page Received Interrupt Enable 1b.12 Parallel Detect Fault Interrupt Enable 1b.11 Link Partner Acknowledge Interrupt Enable 1b ...

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... KS8721BL/SL Address Name 1f.6 Enable Pause (Flow-Control Result) 1f.5 PHY Isolate 1f.4:2 Operation Mode Indication [000] = Still in auto-negotiation. 1f.1 Enable SQE Test 1f.0 Disable Data Scrambling Note: 1. RW: Read/Write, RO: Read Only, SC: Self Clear, LH: Latch High, LL: Latch Low. Some of the default values are set by strap-in. See “Strapping Options.” ...

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... KS8721BL/SL Absolute Maximum Ratings Storage Temperature (T ) ....................... – +150 C S Supply Referenced to GND ........................ –0.5V to +4.0V All Pins ........................................................ –0.5V to +4.0V Important: Please read the Notes at the bottom of the page. Electrical Characteristics V = 3.3V 10% DD Symbol Parameter Total Supply Current (including TX output driver current) I Normal 100BASE-TX ...

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... KS8721BL/SL Symbol Parameter 100BASE-TX Transmit (measured differentially after 1:1 transformer) Duty Cycle Distortion Overshoot V Reference Voltage of ISET SET Propagation Delay Jitters 10BASE-TX Receive R RX+/RX– Differential IN Input Resistance V Squelch Threshold SQ 10BASE-TX Transmit (measured differentially after 1:1 transformer) V Peak Differential Output Voltage ...

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... KS8721BL/SL Timing Diagrams Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXEN Hold After TXC High HD2 t TXEN High to CRS Asserted Latency CRS1 t TXEN Low to CRS De-Asserted Latency CRS2 ...

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... KS8721BL/SL TXC TXEN TXD[3:0], TXER CRS TX+/TX- Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXER Hold After TXC High HD2 t TXEN Hold After TXC High HD3 t TXEN High to CRS Asserted Latency ...

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... KS8721BL/SL RX+/RX- CRS RXDV RXD[3:0] RXER RXC Symbol Parameter t RXC Period P t RXC Pulse Width WL t RXC Pulse Width WH t RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC SU t RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC HD t CRS to RXD Latency Aligned ...

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... KS8721BL/SL TX+/TX- TX+/TX- Figure 7. Auto-Negotiation/Fast Link Pulse Timing Symbol Parameter t FLP Burst to FLP Burst BTB t FLP Burst Width FLPW t Clock/Data Pulse Width PW t Clock Pulse to Data Pulse CTD t Clock Pulse to Clock Pulse CTC Number of Clock/Data Pulses per Burst Table 6. Auto-Negotiation/Fast Link Pulse Timing ...

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... KS8721BL/SL MDC MDI O (Into Ch ip) MDI O (Out of Chip) Symbol Parameter t MDC Period P t MDIO Set-Up to MDC (MDIO as Input) MD1 t MDIO Hold After MDC (MDIO as Input) MD2 t MDC to MDIO Valid (MDIO as Output) MD3 May 2004 MD1 MD2 Valid Data t MD3 Figure 8. Serial Management Interface Timing Table 7 ...

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... Figure 10. Reference Circuit, Strapping Option Pins M9999-051704 tsr Figure 9. Reset Timing Table 8. Reset Timing Parameters 2.5V 220 Pull-Up 10k LED pin KS8721BL/SL 2.5V 220 Pull-down LED pin KS8721BL/SL 1k Reference circuits for unmanaged programming through LED ports. 30 Micrel Min Typ Max Units 50 s May 2004 ...

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... KS8721BL/SL Selection of Isolation Transformer One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common-mode choke is recommended for exceeding FCC requirements. The following table gives recommended transformer characteristics. Characteristic Turns Ratio Open-Circuit Inductance (min.) Leakage Inductance (max.) Inter-Winding Capacitance (max.) D ...

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... KS8721BL/SL Package Information M9999-051704 48-Pin SSOP (SM) 32 Micrel May 2004 ...

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... KS8721BL/SL MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 TEL The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. ...