LM2663M National Semiconductor, LM2663M Datasheet - Page 7

• Manufacturer Part Number: LM2663M
• Description: DC/DC Charge Pump Converter IC
• Manufacturer: National Semiconductor

Specifications of LM2663M

• Output Current: 200mA
• No. Of Pins: 8
• Power Dissipation Pd: 735mW
• Mounting Type: Surface Mount
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5.5V
• Leaded Process Compatible: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Application Information
SIMPLE NEGATIVE VOLTAGE CONVERTER
The main application of LM2662/LM2663 is to generate a
negative supply voltage. The voltage inverter circuit uses
only two external capacitors as shown in the Basic Applica-
tion Circuits. The range of the input supply voltage is 1.5V to
5.5V. For a supply voltage less than 3.5V, the LV pin must be
connected to ground to bypass the internal regulator cir-
cuitry. This gives the best performance in low voltage appli-
cations. If the supply voltage is greater than 3.5V, LV may be
connected to ground or left open. The choice of leaving LV
open simplifies the direct substitution of the LM2662/
LM2663 for the LMC7660 Switched Capacitor Voltage Con-
verter.
The output characteristics of this circuit can be approximated
by an ideal voltage source in series with a resistor. The volt-
age source equals −(V+). The output resistance R
function of the ON resistance of the internal MOS switches,
the oscillator frequency, and the capacitance and ESR of C
and C
ing C
of the ESR of the pumping capacitor C
in the output resistance. The output capacitor C
and discharging at a current approximately equal to the out-
put current, therefore, its ESR only counts once in the output
resistance. A good approximation is:
where R
MOS switches shown in Figure 2 .
High value, low ESR capacitors will reduce the output resis-
tance. Instead of increasing the capacitance, the oscillator
frequency can be increased to reduce the 2/(f
Once this term is trivial compared with R
ther increasing in oscillator frequency and capacitance will
become ineffective.
The peak-to-peak output voltage ripple is determined by the
oscillator frequency, and the capacitance and ESR of the
output capacitor C
Again, using a low ESR capacitor will result in lower ripple.
POSITIVE VOLTAGE DOUBLER
The LM2662/LM2663 can operate as a positive voltage dou-
bler (as shown in the Basic Application Circuits). The dou-
bling function is achieved by reversing some of the connec-
tions to the device. The input voltage is applied to the GND
pin with an allowable voltage from 2.5V to 5.5V. The V+ pin
is used as the output. The LV pin and OUT pin must be con-
nected to ground. The OSC pin can not be driven by an ex-
ternal clock in this operation mode. The unloaded output
voltage is twice of the input voltage and is not reduced by the
diode D
The Schottky diode D
nal oscillator circuit uses the V+ pin and the LV pin (con-
nected to ground in the voltage doubler circuit) as its power
rails. Voltage across V+ and LV must be larger than 1.5V to
insure the operation of the oscillator. During start-up, D
used to charge up the voltage at V+ pin to start the oscillator;
also, it protects the device from turning-on its own parasitic
1
2
is approximately twice as the output current, the effect
. Since the switching current charging and discharg-
1
SW
’s forward drop.
is the sum of the ON resistance of the internal
2
:
1
is only needed for start-up. The inter-
1
is multiplied by four
SW
and ESRs, fur-
osc
2
is charging
x C
1
out
) term.
is a
1
is
1
7
diode and potentially latching-up. Therefore, the Schottky di-
ode D
charge the output capacitor at start-up, as well as a low for-
ward voltage to prevent the internal parasitic diode from
turning-on. A Schottky diode like 1N5817 can be used for
most applications. If the input voltage ramp is less than 10V/
ms, a smaller Schottky diode like MBR0520LT1 can be used
to reduce the circuit size.
SPLIT V+ IN HALF
Another interesting application shown in the Basic Applica-
tion Circuits is using the LM2662/LM2663 as a precision volt-
age divider. Since the off-voltage across each switch equals
V
CHANGING OSCILLATOR FREQUENCY
For the LM2662, the internal oscillator frequency can be se-
lected using the Frequency Control (FC) pin. When FC is
open, the oscillator frequency is 20 kHz; when FC is con-
nected to V+, the frequency increases to 150 kHz. A higher
oscillator frequency allows smaller capacitors to be used for
equivalent output resistance and ripple, but increases the
typical supply current from 0.3 mA to 1.3 mA.
The oscillator frequency can be lowered by adding an exter-
nal capacitor between OSC and GND (See typical perfor-
mance characteristics). Also, in the inverter mode, an exter-
nal clock that swings within 100 mV of V+ and GND can be
used to drive OSC. Any CMOS logic gate is suitable for driv-
ing OSC. LV must be grounded when driving OSC. The
maximum external clock frequency is limited to 150 kHz.
The switching frequency of the converter (also called the
charge pump frequency) is half of the oscillator frequency.
Note: OSC cannot be driven by an external clock in the voltage-doubling
SHUTDOWN MODE
For the LM2663, a shutdown (SD) pin is available to disable
the device and reduce the quiescent current to 10 µA. Apply-
ing a voltage greater than 2V to the SD pin will bring the de-
vice into shutdown mode. While in normal operating mode,
the SD pin is connected to ground.
Open
V+
Open or V+
N/A
Open
External
Capacitor
External Clock
(inverter mode only)
IN
/2, the input voltage can be raised to +11V.
TABLE 1. LM2662 Oscillator Frequency Selection
TABLE 2. LM2663 Oscillator Frequency Selection
mode.
FC
1
OSC
should have enough current carrying capability to
Open
Open
External Capacitor
External Clock
(inverter mode only)
150 kHz
See Typical Performance
Characteristics
External Clock Frequency
OSC
Oscillator
20 kHz
150 kHz
See Typical
Performance
Characteristics
External Clock
Frequency
Oscillator
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