LM87CIMTX National Semiconductor, LM87CIMTX Datasheet - Page 26

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LM87CIMTX

Manufacturer Part Number
LM87CIMTX
Description
IC,Data Acquisition System,8-CHANNEL,8-BIT,TSSOP,24PIN,PLASTIC
Manufacturer
National Semiconductor
Datasheets

Specifications of LM87CIMTX

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Functional Description
13.5 Configuration Register 1 — Address 40h
Power on default –
13.6 Interrupt Status Register 1 — Address 41h
Power on default –
+2.5Vin
Vccp1
Vcc
+5Vin
Int. Temp.
Ext. Temp.
FAN1/AIN1
FAN2/AIN2
Start
INT # Enable
THERM#
Enable
INT#_Clear
RESET #
Reserved
THERM#_Clear
INITIALIZATION
Name
Name
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
<
<
Read/Write
7:0
7:0
Read/Write
>
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
>
= 00001000 binary
= 0000 0000 binary
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates the fan count limit has been exceeded or an AIN1 High or Low limit has
been exceeded.
A one indicates the fan count limit has been exceeded or an AIN2 High or Low limit has
been exceeded.
A one enables startup of monitoring operations, a zero puts the part in standby mode.
Note: The outputs of Interrupt pins will not be cleared if the user writes a zero to this
location after an interrupt has occurred, unlike the “INT_Clear” bit.
At start up, limit checking functions and scanning begin. Note, all limits should be set in
the Value RAM before setting this bit HIGH.
A one enables the INT # Interrupt output.
A one enables the THERM # Interrupt output.
A one disables the INT # output without affecting the contents of Interrupt Status
Registers. The device will stop monitoring. It will resume upon clearing of this bit.
A one outputs a 20 ms minimum active low reset signal at RESET # . This bit is cleared
once the pulse has gone inactive.
A one disables the THERM # output without affecting the contents of Interrupt Status
Registers.
A one restores power on default values to the Configuration Register, Interrupt Status
Registers, Interrupt Mask Registers, CI Clear Register, VID/Fan Divisor Register, VID4,
Temperature Configuration Register, and the Extended Mode Registers. This bit clears
itself since the power on default is zero.
(Continued)
26
Description
Description

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