LM87CIMTX National Semiconductor, LM87CIMTX Datasheet - Page 6

• Manufacturer Part Number: LM87CIMTX
• Description: IC,Data Acquisition System,8-CHANNEL,8-BIT,TSSOP,24PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LM87CIMTX

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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SERIAL BUS TIMING CHARACTERISTICS
AC Electrical Characteristics
The following specifications apply for +2.8 V
face limits apply for T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: The Absolute maximum input range for :
Note 4: When the input voltage (V
maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
Note 6: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 7: See the section titled “Surface Mount” found in any post 1986 National Semiconductor Linear Data Book for other methods of soldering surface mount
devices.
Note 8: Parasitics and or ESD protection circuitry are shown in the figure below for the LM87’s pins. The nominal breakdown voltage of the zener D3 is 6.5 V. Care
should be taken not to forward bias the parasitic diode, D1, present on pins: A0/NTEST_OUT, A1 and DACOut/NTEST_IN. Doing so by more than 50 mV may corrupt
a temperature or voltage measurement.
+2.5Vin - −0.3 V to (1.4 x V
+3.3Vin - −0.3 V to (1.8 x V
t
Symbol
TIMEOUT
t
t
C
t
rise
t
t
t
t
fall
1
2
3
4
5
L
SMBCLK (Clock) Period
SMBCLK and SMBData Rise Time
SMBCLK and SMBData Fall Time
Data In Setup Time to SMBCLK High
Data Out Stable After SMBCLK Low
SMBData Low Setup Time to SMBCLK Low
(start)
SMBData High Hold Time After SMBCLK
High (stop)
SMBCLK low time required to reset the Serial
Bus Interface to the Idle State
Capacitive Load on SMBCLK and SMBData
A
+
+
+ 0.42 V or 6 V, whichever is smaller
+ 0.55 V or 6 V, whichever is smaller.
= T
IN
) at any pin exceeds the power supplies (V
J
= T
MIN
Parameter
to T
D
= (T
MAX
FIGURE 1. Serial Bus Timing Diagram
DC
J
; all other limits T
max−T
≤V
+
A
≤ +3.8 V
)/θ
10099504
JA
.
DC
IN
6
<
on SMBCLK and SMBData, unless otherwise specified. Bold-
A
GND or V
= T
Conditions
J
= 25˚C. (Note 17)
IN
>
V
+
), the current at that pin should be limited to 5 mA. The 20 mA
J
max, θ
JA
(Note 9)
Typical
and the ambient temperature, T
31
(Note 10)
Limits
300
100
100
300
100
100
2.5
25
35
80
1
A
. The maximum
ms (max)
pF (max)
µs (max)
ns (max)
ns (max)
ms (min)
(Limits)
µs (min)
ns (min)
ns (min)
ns (min)
ns (min)
Units
ms