LP38692SDX-ADJ National Semiconductor, LP38692SDX-ADJ Datasheet - Page 11

• Manufacturer Part Number: LP38692SDX-ADJ
• Description: IC,VOLT REGULATOR,ADJUSTABLE,+1.25 TO +9V,CMOS,LLCC,6PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LP38692SDX-ADJ

• Rohs Compliant: NO

Application Hints
load changes above that frequency. This means the effective
output impedance of the IC at frequencies above 100 kHz is
determined only by the output capacitor(s).
In applications where the load is switching at high speed, the
output of the IC may need RF isolation from the load. It is
recommended that some inductance be placed between the
output capacitor and the load, and good RF bypass capaci-
tors be placed directly across the load.
PCB layout is also critical in high noise environments, since
RFI/EMI is easily radiated directly into PC traces. Noisy
circuitry should be isolated from "clean" circuits where pos-
sible, and grounded through a separate path. At MHz fre-
quencies, ground planes begin to look inductive and RFI/
EMI can cause ground bounce across the ground plane. In
multi-layer PCB applications, care should be taken in layout
so that noisy power and ground planes do not radiate directly
into adjacent layers which carry analog power and ground.
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OUTPUT NOISE
Noise is specified in two ways- Spot Noise or Output Noise
density is the RMS sum of all noise sources, measured at
the regulator output, at a specific frequency (measured with
a 1Hz bandwidth). This type of noise is usually plotted on a
curve as a function of frequency. Total Output Noise or
Broad-Band Noise is the RMS sum of spot noise over a
specified bandwidth, usually several decades of frequencies.
Attention should be paid to the units of measurement. Spot
noise is measured in units µV/root-Hz or nV/root-Hz and total
output noise is measured in µV(rms)
The primary source of noise in low-dropout regulators is the
internal reference. Noise can be reduced in two ways: by
increasing the transistor area or by increasing the current
drawn by the internal reference. Increasing the area will
decrease the chance of fitting the die into a smaller package.
Increasing the current drawn by the internal reference in-
creases the total supply current (ground pin current).
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