PIC10F206T-E/OT Microchip Technology, PIC10F206T-E/OT Datasheet - Page 4

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TSOP,6PIN,PLASTIC

PIC10F206T-E/OT

Manufacturer Part Number
PIC10F206T-E/OT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TSOP,6PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 10Fr

Specifications of PIC10F206T-E/OT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
3
Program Memory Size
768B (512 x 12)
Program Memory Type
FLASH
Ram Size
24 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
SOT-23-6
Processor Series
PIC10F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
24 B
Interface Type
USB
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
4
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
AC162059 - HEADER INTRFC MPLAB ICD2 8/14PINXLT06SOT - SOCKET TRAN ICE 6SOT W/CABLEAC163020 - ADAPTER PROGRAMMER PIC10F2XXAC164321 - MODULE SKT 6L PM3 SOT23AC164037 - MODULE SKT 6L PROMATE II SOT23
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
PIC10F200/202/204/206
APPENDIX A:
Rev A Document (6/2004)
First revision of this document.
Rev B Document (6/2004)
Added Module 2, V
Rev C Document (9/2004)
Added Module 3, MPLAB IDE and the _CONFIG
assembly directive.
Rev D Document (6/2006)
Added the following Modules to the “Clarifications/
Corrections to the Data Sheet” section:
• Module 1,
• Module 2, “Voltage Reference”
• Module 3, “8-Lead 2x3 DFN (MC) Packaging”
• Module 4, “8-Lead 2x3 DFN (MC) Package – Top
• Module 5, “6-Lead SOT-23 (OT) Package – Top
Rev E Document (3/2007)
Revised Module 1 and Module 2 work arounds.
Clarification/Corrections to the Data Sheet:
Revised Module 3: Replaced DFN Package Drawing;
Added Module 6, “Timer0 Clock”;
Added Module 7, Special Features of the CPU,
Register 9-1.
Rev F Document (5/2007)
Revised Module 3, Table 1, Note 1.
Clarification/Corrections to the Data Sheet:
Data Sheet was updated. The following was removed:
• Module 1,
• Module 2, “Voltage Reference”
• Module 3, “8-Lead 2x3 DFN (MC) Packaging”
• Module 4, “8-Lead 2x3 DFN (MC) Package – Top
• Module 5, “6-Lead SOT-23 (OT) Package – Top
• Module 6, “Timer0 Clock”;
Module 7, Special Features of the CPU, Register 9-1 is
renumbered to Module 1.
Rev G Document (6/2007)
Moved Module 3 to Module 4.
Added Module 3: I
DS80194G-page 4
Marking”
Marking”
Marking”
Marking”
Internal Oscillator”
Internal Oscillator”
PD
REF
, Power-Down Base current
REVISION HISTORY
is disabled in Sleep.
© 2007 Microchip Technology Inc.

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