PIC16F54T-I/SS Microchip Technology, PIC16F54T-I/SS Datasheet - Page 2

• Manufacturer Part Number: PIC16F54T-I/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F54T-I/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 12
• Program Memory Size: 768B (512 x 12)
• Program Memory Type: FLASH
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F54
2.0
2.1
The user memory space extends from 0x000 to 0x1FF.
In Program/Verify mode, the program memory space
extends from 0x000 to 0x3FF, with the first half (0x000-
0x1FF) being user program memory and the second
half (0x200-0x3FF) being configuration memory. The
PC will increment from 0x000 to 0x1FF, then to 0x200
(not to 0x0000).
In the configuration memory space, 0x200-0x23F are
physically implemented. However, only locations
0x200 through 0x203 are available. Other locations are
reserved.
2.2
A user may store identification information (ID) in four
user ID locations. The user ID locations are mapped in
[0x200: 0x203]. It is recommended that the user use
only the four Least Significant bits (LSb) of each user
ID location. The user ID locations read out normally,
even after code protection is enabled. It is recom-
mended that user ID locations are written as ‘xxxx
xxxx bbbb’ where ‘bbbb’ is user ID information.
The 12 bits may be programmed, but only the four LSbs
are displayed by MPLAB
care” bits and are not ready by MPLAB IDE.
2.3
The Configuration Word is located at 0x3FF and is only
available upon Program mode entry. Once an Incre-
ment Address command is issued, the Configuration
Word is no longer accessible regardless of the address
of the program counter.
DS41207D-page 2
PROGRAM MODE ENTRY
Program Memory Map
User ID Locations
Configuration Word
®
IDE. The xxxx’s are “don’t
Preliminary
Programming/Verify mode places all other logic into the
FIGURE 2-1:
2.4
The Program/Verify mode is entered by holding pins
ICSPCLK and ICSPDAT low while raising V
V
this mode, the user program memory and configuration
memory can be accessed and programmed in serial
fashion. Clock and data are Schmitt Trigger input in this
mode.
The sequence that enters the device into the
Reset state (the MCLR pin was initially at V
means that all I/O are in the Reset state (high-impedance
inputs).
2.4.1
The programming sequence loads a word, programs,
verifies, and finally increments the PC. See Figure 2-9.
Program/Verify mode entry will set the PC to 0x3FF
(Configuration Word address). The Increment Address
command will increment the PC. The available
commands are shown in Table 2-1.
IL
to V
DD
Program/Verify Mode
. Then raise V
PROGRAMMING
Configuration Word
User ID Locations
Unimplemented
Reset Vector
PROGRAM MEMORY MAP
Program
On-chip
Reserved
Memory
© 2007 Microchip Technology Inc.
PP
from V
IL
to V
000h
0FFh
100h
1FFh
200h
203h
204h
23Fh
240h
3FEh
3FFh
IHH
DD
. Once in
-
pin from
IL
). This