PIC16F610-E/ML Microchip Technology, PIC16F610-E/ML Datasheet - Page 93

1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE

PIC16F610-E/ML

Manufacturer Part Number
PIC16F610-E/ML
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F610-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
10.4
The Enhanced PWM Mode can generate a PWM signal
on up to four different output pins with up to 10-bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the P1M bits of the
CCP1CON register must be set appropriately.
FIGURE 10-5:
TABLE 10-6:
© 2009 Microchip Technology Inc.
ECCP Mode
Single
Half-Bridge
Full-Bridge, Forward
Full-Bridge, Reverse
Note 1: The TRIS register value for each PWM output must be configured appropriately.
CCPR1H (Slave)
Duty Cycle Registers
Note 1:
Comparator
2: Clearing the CCP1CON register will relinquish ECCP control of all PWM output pins.
3: Any pin not used by an Enhanced PWM mode is available for alternate pin functions
PWM (Enhanced Mode)
CCPR1L
PR2
TMR2
Comparator
The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit
time base.
EXAMPLE PIN ASSIGNMENTS FOR VARIOUS PWM ENHANCED MODES
(1)
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Clear Timer2,
toggle PWM pin and
latch duty cycle
CCP1<1:0>
P1M
00
10
01
11
R
S
P1M<1:0>
Q
PIC16F610/616/16HV610/616
CCP1/P1A
Yes
Yes
Yes
Yes
PWM1CON
Controller
Output
2
CCP1/P1A
P1B
P1C
P1D
The PWM outputs are multiplexed with I/O pins and are
designated P1A, P1B, P1C and P1D. The polarity of the
PWM pins is configurable and is selected by setting the
CCP1M bits in the CCP1CON register appropriately.
Table 10-6 shows the pin assignments for each
Enhanced PWM mode.
Figure 10-5 shows an example of a simplified block
diagram of the Enhanced PWM module.
4
CCP1M<3:0>
Note:
P1B
Yes
Yes
Yes
No
TRISC<5>
TRISC<4>
TRISC<3>
TRISC<2>
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
prevent
P1C
Yes
Yes
No
No
the
CCP1/P1A
P1B
P1C
P1D
generation
DS41288F-page 93
P1D
Yes
Yes
No
No
of
an

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