PIC16F610-E/P Microchip Technology, PIC16F610-E/P Datasheet - Page 122
PIC16F610-E/P
Manufacturer Part Number
PIC16F610-E/P
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 14 PDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC12F609T-ISN.pdf
(26 pages)
2.PIC16F616T-ISL.pdf
(214 pages)
3.PIC16F616T-ISL.pdf
(8 pages)
Specifications of PIC16F610-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
14-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14ACICE0207 - MPLABICE 14P 300 MIL ADAPTER
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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PIC16F610/616/16HV610/616
12.6
The Watchdog Timer is a free running, on-chip RC
oscillator, which requires no external components. This
RC oscillator is separate from the external RC oscillator
of the CLKIN pin and INTOSC. That means that the
WDT will run, even if the clock on the OSC1 and OSC2
pins of the device has been stopped (for example, by
execution of a SLEEP instruction). During normal oper-
ation, a WDT Time-out generates a device Reset. If the
device is in Sleep mode, a WDT Time-out causes the
device to wake-up and continue with normal operation.
The WDT can be permanently disabled by program-
ming
(Section 12.1 “Configuration Bits”).
FIGURE 12-2:
TABLE 12-7:
DS41288F-page 122
WDTE = 0
CLRWDT Command
Exit Sleep + System Clock = EXTRC, INTRC, EC
Exit Sleep + System Clock = XT, HS, LP
T0CKI
pin
(= F
CLKOUT
the
Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION register.
OSC
T0SE
Watchdog Timer (WDT)
/4)
Configuration
WDT STATUS
Watchdog
WDTE
Timer
WATCHDOG TIMER BLOCK DIAGRAM
T0CS
0
1
bit,
WDTE,
Conditions
PSA
0
1
as
Prescaler
clear
8-bit
8
PS<2:0>
12.6.1
The WDT has a nominal time-out period of 18 ms (with
no prescaler). The time-out periods vary with
temperature, V
part (see Table 15-4, Parameter 31). If longer time-out
periods are desired, a prescaler with a division ratio of
up to 1:128 can be assigned to the WDT under
software control by writing to the OPTION register.
Thus, time-out periods up to 2.3 seconds can be
realized.
The CLRWDT and SLEEP instructions clear the WDT
and the prescaler, if assigned to the WDT, and prevent
it from timing out and generating a device Reset.
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer Time-out.
12.6.2
It should also be taken in account that under worst-
case conditions (i.e., V
Max. WDT prescaler) it may take several seconds
before a WDT Time-out occurs.
3
WDT PERIOD
WDT PROGRAMMING
CONSIDERATIONS
PSA
PSA
1
0
1
0
DD
and process variations from part to
SYNC 2
Time-Out
Cycles
DD
WDT
Cleared until the end of OST
© 2009 Microchip Technology Inc.
= Min., Temperature = Max.,
Cleared
WDT
Data Bus
Set Flag bit T0IF
8
TMR0
on Overflow
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