PIC16F677T-E/SS Microchip Technology, PIC16F677T-E/SS Datasheet - Page 10

• Manufacturer Part Number: PIC16F677T-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F677T-E/SS

• Rohs Compliant: YES
• Mfg Application Notes: Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPDM164125 - BOARD DEMO PICDEM TOUCH SENSE 1AC162061 - HEADER INTRFC MPLAB ICD2 20PIN
• Lead Free Status / Rohs Status: Details

PIC16F631/677/685/687/689/690
EXAMPLE 3:
5.2 LP/Timer1 Oscillator Operation Below 25°C
DS80243M-page 10
Update:
1-2% of devices experience reduced drive as
temperatures approach -40°C. This will result in a
loss of Timer1 counts or stopped Timer1
oscillation.
This can also prevent Timer1 oscillator start-up
under cold conditions.
Work around
Use of low-power crystals properly matched to the
device will reduce the likelihood of failure. A 1M
resistor between OSC2 and V
improve the drive strength of the circuit.
Affected Silicon Revisions
PIC16F631/PIC16F677
PIC16F685/PIC16F687/PIC16F689/
PIC16F690
BTFSC
GOTO
BTFSS
GOTO
BCF
BSF
BCF
BSF
BCF
Critical Timing of code sequence for instructions following last write to TMR1L or TMR1H.
A1
A3
X
X
A4
X
TMR1L,0
$-1
TMR1L,0
$-1
T1CON,TMR1CS
TMR1H,7
T1CON,TMR1ON
T1CON,TMR1CS
T1CON,TMR1ON
A5
X
A6
X
;Timer has just incremented, 31 s before next rising edge to
;complete reload
;Select HFINTOSC for Timer1
;Timer1 high byte 0x80
;Timer1 off
;Select external crystal
;Timer1 on
DD
will further
5.3 LP/Timer1 Oscillator Shared Operation
When using LP oscillator as the system clock and
enabling Timer1 external oscillator, the shared
crystal will clock both the core and Timer1. On
execution of the SLEEP instruction, the oscillator
amplifier will be disabled and Timer1 will not be
clocked while the device is in Sleep.
Work around
None.
Affected Silicon Revisions
PIC16F631/PIC16F677
PIC16F685/PIC16F687/PIC16F689/
PIC16F690
A1
A3
X
X
A4
X
A5
X
 2010 Microchip Technology Inc.
A6
X