PIC16F689-E/ML Microchip Technology, PIC16F689-E/ML Datasheet - Page 60
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC](/photos/6/64/66481/c04-126_ml_sml.jpg)
PIC16F689-E/ML
Manufacturer Part Number
PIC16F689-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
Specifications of PIC16F689-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- Current page: 60 of 306
- Download datasheet (6Mb)
PIC16F631/677/685/687/689/690
FIGURE 3-9:
TABLE 3-2:
DS41262E-page 58
CONFIG
OSCCON
OSCTUNE
PIE1
PIR1
Legend:
Note 1:
Clock Monitor Output
Name
2:
Sample Clock
(2)
Note:
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
See Configuration Word register (Register 14-1) for operation of all register bits.
OSCFIF
System
Output
Clock
Bit 7
CPD
—
—
—
—
(Q)
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
FSCM TIMING DIAGRAM
IRCF2
ADIE
ADIF
Bit 6
CP
—
MCLRE
IRCF1
RCIE
RCIF
Bit 5
—
Test
PWRTE
IRCF0
TUN4
Bit 4
TXIE
TXIF
WDTE
SSPIE
SSPIF
OSTS
TUN3
Bit 3
CCP1IE
CCP1IF
FOSC2
TUN2
Bit 2
HTS
Test
TMR2IE
TMR2IF
Oscillator
Failure
FOSC1
TUN1
Bit 1
LTS
TMR1IE
TMR1IF
FOSC0
TUN0
Bit 0
SCS
© 2008 Microchip Technology Inc.
Detected
-110 x000
---0 0000
-000 0000
-000 0000
POR, BOR
Value on
Failure
—
Test
-110 x000
---u uuuu
-000 0000
-000 0000
Resets
Value on
all other
—
(1)
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