PIC16F767-E/SS Microchip Technology, PIC16F767-E/SS Datasheet - Page 92

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PIC16F767-E/SS

Manufacturer Part Number
PIC16F767-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F767-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
AUSART, I2C, MSSP, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
A/d Bit Size
10 bit
A/d Channels Available
11
Height
1.75 mm
Length
10.2 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F767-E/SS
Manufacturer:
Microchip Technology
Quantity:
135
PICmicro MID-RANGE MCU FAMILY
5.9
DS31005A-page 5-10
Design Tips
Question 1:
Answer 1:
1.
2.
Question 2:
Answer 2:
if the STATUS register is the destination for an instruction that affects the Z, DC, or C bits, the
write to these bits is disabled. These bits are set or cleared based on device logic. Therefore, to
modify bits in the STATUS register it is recommended to use the BCF and BSF instructions.
The destination of the instruction may be specifying the W register (d = 0) instead of the
file register (d = 1).
The register bank select bits (RP1:RP0 or IRP) may not be properly selected. Also if inter-
rupts are used, the register bank select bits may not be properly restored when exiting the
interrupt handler.
My program algorithm does not seem to function correctly.
I cannot seem to modify the STATUS register flags.
1997 Microchip Technology Inc.

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