PIC16F916T-I/SS Microchip Technology, PIC16F916T-I/SS Datasheet - Page 37

• Manufacturer Part Number: PIC16F916T-I/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F916T-I/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA160011 - DAUGHTER BOARD PICDEM LCD 16F91X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.2.2.4
The PIE1 register contains the interrupt enable bits, as
shown in Register 2-4.
REGISTER 2-4:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
EEIE
PIE1 Register
EEIE: EE Write Complete Interrupt Enable bit
1 = Enables the EE write complete interrupt
0 = Disables the EE write complete interrupt
ADIE: A/D Converter (ADC) Interrupt Enable bit
1 = Enables the ADC interrupt
0 = Disables the ADC interrupt
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
SSPIE: Synchronous Serial Port (SSP) Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the Timer2 to PR2 match interrupt
0 = Disables the Timer2 to PR2 match interrupt
TMR1IE: Timer1 Overflow Interrupt Enable bit
1 = Enables the Timer1 overflow interrupt
0 = Disables the Timer1 overflow interrupt
R/W-0
ADIE
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
W = Writable bit
‘1’ = Bit is set
R/W-0
RCIE
PIC16F913/914/916/917/946
R/W-0
TXIE
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSPIE
R/W-0
Note:
Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
CCP1IE
R/W-0
x = Bit is unknown
TMR2IE
R/W-0
DS41250F-page 35
TMR1IE
R/W-0
bit 0