PIC16HV610-E/ML Microchip Technology, PIC16HV610-E/ML Datasheet - Page 10
![1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16HV610-E/ML
Manufacturer Part Number
PIC16HV610-E/ML
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC12F609T-ISN.pdf
(26 pages)
2.PIC16F616T-ISL.pdf
(214 pages)
3.PIC16F616T-ISL.pdf
(8 pages)
4.PIC16HV616-ISL.pdf
(26 pages)
Specifications of PIC16HV610-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
11
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Processor Series
PIC16H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS-232 , USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
11
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616
4.1.4.2
After receiving this command, the chip will load in a
14-bit “data word” when 16 cycles are applied, as
described in Section 4.1.4.1 “Load Configuration”.
A timing diagram of this command is shown in
Figure 4-5.
FIGURE 4-5:
4.1.4.3
After receiving this command, the chip will transmit
data bits out of the program memory (user or configu-
ration) currently accessed, starting with the second
rising edge of the clock input. The data pin will go into
Output mode on the second rising clock edge, and it
will revert to Input mode (high-impedance) after the
16th rising edge.
If the program memory is code-protected (CP = 0), the
data is read as zeros.
A timing diagram of this command is shown in Figure 4-6.
FIGURE 4-6:
DS41396A-page 10
ICSPDAT
ICSPCLK
ICSPDAT
ICSPCLK
Load Data For Program Memory
Read Data From Program Memory
1
1
LOAD DATA FOR PROGRAM MEMORY COMMAND
READ DATA FROM PROGRAM MEMORY COMMAND
1
0
0
T
2
SET
0
2
1
1
T
1
3
SET
T
3
0
HLD
input
1
T
1
HLD
4
0
4
0
1
5
X
5
X
X
6
T
6
DLY
T
X
T
DLY
T
DLY
DLY
1
3
1
2
1
strt_bit
1
strt_bit
2
2
LSb
LSb
T
DLY
3
T
3
SET
3
T
HLD
1
4
output
1
2009 Microchip Technology Inc.
4
5
5
15
15
MSb
MSb
16
stp_bit
16
stp_bit
input