PIC16LF819T-I/SSTSL Microchip Technology, PIC16LF819T-I/SSTSL Datasheet - Page 2

• Manufacturer Part Number: PIC16LF819T-I/SSTSL
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF819T-I/SSTSL

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC16LF819TISSTSL

PIC16F818/819
1. Module: Internal RC Oscillator IOFS bit
EXAMPLE 1:
DS80212C-page 2
DlyVarH
DlyVarL
;Load the delay variable DlyVarH with the following value for the selected frequency:
delay
dly_loop
RETURN
The device data sheet states when an INTOSC
frequency is selected (125, 250, 500 kHz, 1, 2, 4,
8 MHz), the frequency will be stable when the
IOFS bit becomes set (IOFS = 1) at 4 ms. The
following applies for applications relying on time
dependent code.
Under the following conditions, any of the INTOSC
frequencies may not be stable when IOFS
becomes set (IOFS = 1). Devices may vary from
one to the next and may take as long as 60 ms to
become stable.
1. Wake from Sleep, internal RC oscillator is
2. POR is executed, internal RC oscillator is
;125kHz
;250kHz
;500kHz
;1MHz
;2MHz
;4MHz
CLRF
MOVLW
MOVWF
DECFSZ
GOTO
DECFSZ
GOTO
selected via the Configuration Word and the
IRCF bits are configured for an INTOSC
frequency.
selected via the Configuration Word and the
IRCF bits are configured for an INTOSC
frequency.
equ
equ
0x0300
0x0600
0x0C00
0x1900
0x3100
0x6200
DlyVarL
0x62
DlyVarH
DlyVarL,f
dly_loop
DlyVarH,f
dly_loop
DELAY ROUTINE
<define address based on application requirements>
<define address based on application requirements>
;insure the correct data memory bank is selected
; for access of data variables
;initialize low delay variable
;initialize high delay variable
;decrement low variable
;decrement high variable
;delay done
Note:
3. The INTRC (31.25 kHz) is clocking the device
Work around
Implement the following software delay shown in
Example 1 after an INTOSC frequency has been
enabled and before any frequency dependent appli-
cation code is executed. This routine will delay
application execution approximately 2K-150K T
(instruction cycles are dependent upon the INTOSC
frequency) to ensure a stable INTOSC frequency.
Date Codes that pertain to this issue:
All date codes.
and a switch to an INTOSC frequency is
executed via modification of the IRCF bits.
This issue applies to TSL and non-TSL
devices.
© 2005 Microchip Technology Inc.
CY