PIC16LF873-04/SO Microchip Technology, PIC16LF873-04/SO Datasheet - Page 25
PIC16LF873-04/SO
Manufacturer Part Number
PIC16LF873-04/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F873-04SO.pdf
(218 pages)
Specifications of PIC16LF873-04/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF873-04/SO
Manufacturer:
MICROCHI
Quantity:
54
Part Number:
PIC16LF873-04/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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2.2.2.6
The PIE2 register contains the individual enable bits for
the CCP2 peripheral interrupt, the SSP bus collision
interrupt, and the EEPROM write operation interrupt.
REGISTER 2-6:
2001 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-1
bit 0
PIE2 Register
PIE2 REGISTER (ADDRESS 8Dh)
Unimplemented: Read as '0'
Reserved: Always maintain this bit clear
Unimplemented: Read as '0'
EEIE: EEPROM Write Operation Interrupt Enable
1 = Enable EE Write Interrupt
0 = Disable EE Write Interrupt
BCLIE: Bus Collision Interrupt Enable
1 = Enable Bus Collision Interrupt
0 = Disable Bus Collision Interrupt
Unimplemented: Read as '0'
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
bit 7
Legend:
R = Readable bit
- n = Value at POR
U-0
—
Reserved
R/W-0
U-0
—
W = Writable bit
’1’ = Bit is set
R/W-0
EEIE
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
BCLIE
R/W-0
U-0
—
PIC16F87X
x = Bit is unknown
U-0
—
DS30292C-page 23
CCP2IE
R/W-0
bit 0
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