PIC18F4520-E/ML Microchip Technology, PIC18F4520-E/ML Datasheet - Page 226

• Manufacturer Part Number: PIC18F4520-E/ML
• Description: 44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4520-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP, SPI, I2C, PSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2420/2520/4420/4520
REGISTER 19-2:
DS39631E-page 224
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3-0
Note 1:
U-0
—
2:
The POR value of the PCFG bits depends on the value of the PBADEN Configuration bit. When
PBADEN = 1, PCFG<2:0> = 000; when PBADEN = 0, PCFG<2:0> = 111.
AN5 through AN7 are available only on 40/44-pin devices.
Unimplemented: Read as ‘0’
VCFG1: Voltage Reference Configuration bit (V
1 = V
0 = V
VCFG0: Voltage Reference Configuration bit (V
1 = V
0 = V
PCFG<3:0>: A/D Port Configuration Control bits:
A = Analog input
PCFG3:
PCFG0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
U-0
REF
REF
—
SS
DD
(1)
(1)
ADCON1: A/D CONTROL REGISTER 1
- (AN2)
+ (AN3)
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
W = Writable bit
‘1’ = Bit is set
VCFG1
R/W-0
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
A
A
VCFG0
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
R/W-0
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D = Digital I/O
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
D
D
D
D
D
D
D
D
A
A
A
A
A
A
A
A
PCFG3
REF
REF
R/W-0
- source)
+ source)
A
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
A
R/W-q
PCFG2
A
A
A
A
A
A
A
A
A
A
A
D
D
D
D
D
(1)
D
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
© 2008 Microchip Technology Inc.
x = Bit is unknown
R/W-q
PCFG1
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
A
(1)
D
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
D
R/W-q
PCFG0
(1)
bit 0