PIC18F64J90-I/PT Microchip Technology, PIC18F64J90-I/PT Datasheet - Page 18

• Manufacturer Part Number: PIC18F64J90-I/PT
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J90-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F85J90 FAMILY
23. Module: Register 8-12: IPR3
REGISTER 8-12:
80286E-page 18
bit 7
Legend:
R = Readable bit
-n = Value at POR
In Register 8-12, on page 106, the POR conditions
for the below interrupt priority bits of the Peripheral
Interrupt Priority Register 3 (IPR3) have been
changed.
LCD Interrupt Priority Bit (LCDIP): The POR
condition should be changed to R/W-1 instead of
R/W-0.
AUSART Receive Priority Flag Bit (RC2IP): The
POR condition should be changed to R-1 instead
of R-0.
U-0
—
LCDIP
R/W-1
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
W = Writable bit
‘1’ = Bit is set
RC2IP
R-1
TX2IP
R-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
AUSART Transmit Interrupt Priority Bit (TX2IP):
The POR condition should be changed to R-1
instead of R-0.
The modified value is indicated in bold text in the
below table.
CCP2IP
R/W-1
© 2008 Microchip Technology Inc.
x = Bit is unknown
CCP1IP
R/W-1
U-0
—
bit 0