PIC18F8490T-I/PT Microchip Technology, PIC18F8490T-I/PT Datasheet - Page 408
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F8490T-I/PT
Manufacturer Part Number
PIC18F8490T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6310-IPT.pdf
(28 pages)
3.PIC18F6390-IPT.pdf
(414 pages)
4.PIC18F6390-IPT.pdf
(16 pages)
5.PIC18F6390-IPT.pdf
(12 pages)
6.PIC18F6390-IPT.pdf
(6 pages)
7.PIC18F6390-IPT.pdf
(4 pages)
Specifications of PIC18F8490T-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Data Rom Size
768 B
Height
1 mm
Length
12 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
12 mm
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8490T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6390/6490/8390/8490
Reset .................................................................................. 51
Resets .............................................................................. 281
RETFIE ............................................................................ 326
RETLW ............................................................................. 326
RETURN .......................................................................... 327
Return Address Stack ........................................................ 66
Return Stack Pointer (STKPTR) ........................................ 67
Revision History ............................................................... 395
RLCF ................................................................................ 327
RLNCF ............................................................................. 328
RRCF ............................................................................... 328
RRNCF ............................................................................. 329
S
SCK .................................................................................. 157
SDI ................................................................................... 157
SDO ................................................................................. 157
Serial Clock, SCK ............................................................. 157
Serial Data In (SDI) .......................................................... 157
Serial Data Out (SDO) ..................................................... 157
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 329
Slave Select (SS) ............................................................. 157
SLEEP .............................................................................. 330
Sleep
Software Enabled BOR ...................................................... 54
Software Simulator (MPLAB SIM) .................................... 346
Special Event Trigger. See Compare (CCP Module).
Special Features of the CPU ............................................ 281
Special Function Registers ................................................ 74
SPI Mode (MSSP)
SS .................................................................................... 157
SSPOV ............................................................................. 187
SSPOV Status Flag .......................................................... 187
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 68
STATUS Register ............................................................... 80
SUBFSR ........................................................................... 341
SUBFWB .......................................................................... 330
SUBLW ............................................................................ 331
DS39629C-page 406
MCLR Reset, during Power-Managed Modes ........... 51
MCLR Reset, Normal Operation ................................ 51
Power-on Reset (POR) .............................................. 51
Programmable Brown-out Reset (BOR) .................... 51
Stack Full Reset ......................................................... 51
Stack Underflow Reset .............................................. 51
Watchdog Timer (WDT) Reset ................................... 51
OSC1 and OSC2 Pin States ...................................... 39
Map ...................................................................... 74–75
Associated Registers ............................................... 165
Bus Mode Compatibility ........................................... 165
Effects of a Reset ..................................................... 165
Enabling SPI I/O ...................................................... 161
Master Mode ............................................................ 162
Master/Slave Connection ......................................... 161
Operation ................................................................. 160
Serial Clock .............................................................. 157
Serial Data In ........................................................... 157
Serial Data Out ........................................................ 157
Slave Mode .............................................................. 163
Slave Select ............................................................. 157
Slave Select Synchronization .................................. 163
Sleep Operation ....................................................... 165
SPI Clock ................................................................. 162
Typical Connection .................................................. 161
R/W Bit ............................................................. 170, 171
SUBULNK ........................................................................ 341
SUBWF ............................................................................ 331
SUBWFB ......................................................................... 332
SWAPF ............................................................................ 332
T
T0CON Register
Table Pointer Operations (table) ........................................ 88
Table Reads ...................................................................... 68
TBLRD ............................................................................. 333
TBLWT ............................................................................. 334
Time-out in Various Situations (table) ................................ 55
Timer0 .............................................................................. 131
Timer1 .............................................................................. 135
Timer2 .............................................................................. 141
Timer3 .............................................................................. 143
Timing Diagrams
PSA Bit .................................................................... 133
T0CS Bit .................................................................. 132
T0PS2:T0PS0 Bits ................................................... 133
T0SE Bit .................................................................. 132
16-Bit Mode Timer Reads and Writes ...................... 132
Associated Registers ............................................... 133
Clock Source Edge Select (T0SE Bit) ..................... 132
Clock Source Select (T0CS Bit) ............................... 132
Operation ................................................................. 132
Overflow Interrupt .................................................... 133
Prescaler. See Prescaler, Timer0.
16-Bit Read/Write Mode .......................................... 137
Associated Registers ............................................... 139
Interrupt ................................................................... 138
Operation ................................................................. 136
Oscillator .......................................................... 135, 137
Overflow Interrupt .................................................... 135
Resetting, Using a Special Event Trigger
TMR1H Register ...................................................... 135
TMR1L Register ....................................................... 135
Use as a Real-Time Clock ....................................... 138
Associated Registers ............................................... 142
Interrupt ................................................................... 142
Operation ................................................................. 141
Output ...................................................................... 142
PR2 Register ........................................................... 153
TMR2 to PR2 Match Interrupt .................................. 153
16-Bit Read/Write Mode .......................................... 145
Associated Registers ............................................... 145
Operation ................................................................. 144
Oscillator .......................................................... 143, 145
Overflow Interrupt ............................................ 143, 145
Special Event Trigger (CCP) ................................... 145
TMR3H Register ...................................................... 143
TMR3L Register ....................................................... 143
A/D Conversion ........................................................ 385
Acknowledge Sequence .......................................... 190
Asynchronous Reception ................................. 209, 225
Asynchronous Transmission ............................ 207, 223
Asynchronous Transmission
Automatic Baud Rate Calculation ............................ 205
Auto-Wake-up Bit (WUE) During
Auto-Wake-up Bit (WUE) During Sleep ................... 210
Baud Rate Generator with Clock Arbitration ............ 184
BRG Overflow Sequence ......................................... 205
Layout Considerations ..................................... 138
Output (CCP) ................................................... 138
(Back-to-Back) ......................................... 207, 223
Normal Operation ............................................ 210
© 2007 Microchip Technology Inc.