PIC18LF2585-I/SP Microchip Technology, PIC18LF2585-I/SP Datasheet - Page 79
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18LF2585-I/SP
Manufacturer Part Number
PIC18LF2585-I/SP
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18LF2585-I/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Data Rom Size
1024 B
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4585-IPT PDF datasheet #3
- PIC18F4585-IPT PDF datasheet #4
- PIC18F4585-IPT PDF datasheet #5
- PIC18F4585-IPT PDF datasheet #6
- PIC18F4585-IPT PDF datasheet #7
- Current page: 79 of 482
- Download datasheet (9Mb)
TABLE 5-2:
© 2007 Microchip Technology Inc.
STATUS
TMR0H
TMR0L
T0CON
OSCCON
HLVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
ECCPR1H
ECCPR1L
ECCP1CON
BAUDCON
ECCP1DEL
ECCP1AS
CVRCON
CMCON
TMR3H
TMR3L
T3CON
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1:
File Name
2:
3:
4:
5:
6:
7:
8:
9:
(9)
(9)
(9)
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset
(BOR)”.
These registers and/or bits are not implemented on PIC18F2X8X devices and are read as ‘0’. Reset values are shown for PIC18F4X8X
devices; individual unimplemented bits should be interpreted as ‘—’.
The PLLEN bit is only available in specific oscillator configuration; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in
INTOSC Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes.
When disabled, these bits read as ‘0’.
CAN bits have multiple functions depending on the selected mode of the CAN module.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
These registers are available on PIC18F4X8X devices only.
(9)
(9)
(9)
(9)
A/D Result Register High Byte
A/D Result Register Low Byte
Timer0 Register High Byte
Timer0 Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
SSP Receive Buffer/Transmit Register
SSP Address Register in I
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
Enhanced Capture/Compare/PWM Register 1 High Byte
Enhanced Capture/Compare/PWM Register 1 Low Byte
Timer3 Register High Byte
Timer3 Register Low Byte
EPWM1M1
VDIRMAG
ECCPASE
TMR0ON
ABDOVF
PRSEN
CVREN
C2OUT
WCOL
IDLEN
GCEN
ADFM
RD16
RD16
IPEN
Bit 7
SMP
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F2585/2680/4585/4680) (CONTINUED)
T3ECCP1
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
EPWM1M0
ECCPAS2
ACKSTAT
PDC6
CVROE
SSPOV
C1OUT
T08BIT
T1RUN
IRCF2
RCIDL
Bit 6
CKE
—
—
—
—
—
—
—
(3)
(2)
(9)
2
C Slave mode. SSP Baud Rate Reload Register in I
ECCPAS1
T1CKPS1
T3CKPS1
EDC1B1
PDC5
SSPEN
ACKDT
VCFG1
ACQT2
DC1B1
C2INV
IRCF1
IRVST
CVRR
CHS3
T0CS
Bit 5
D/A
—
—
—
—
(3)
PIC18F2585/2680/4585/4680
ECCPAS0
T1CKPS0
T3CKPS0
HLVDEN
EDC1B0
PDC4
ACKEN
CVRSS
VCFG0
ACQT1
DC1B0
C1INV
IRCF0
CHS2
SCKP
T0SE
Bit 4
CKP
—
RI
N
P
Preliminary
(3)
ECCP1M3
T3CCP1
T1OSCEN
CCP1M3
PSSAC1
HLVDL3
PDC3
SSPM3
PCFG3
ACQT0
BRG16
RCEN
OSTS
CHS1
CVR3
Bit 3
PSA
CIS
OV
TO
—
S
(3)
(9)
ECCP1M2
TMR2ON
CCP1M2
T1SYNC
PSSAC0
T3SYNC
HLVDL2
PDC2
SSPM2
PCFG2
ADCS2
T0PS2
CHS0
CVR2
IOFS
Bit 2
R/W
PEN
CM2
PD
—
—
Z
(3)
2
C Master mode.
PSSBD1
GO/DONE
ECCP1M1
T2CKPS1
TMR1CS
TMR3CS
CCP1M1
HLVDL1
PDC1
SSPM1
PCFG1
ADCS1
T0PS1
RSEN
SCS1
CVR1
WUE
Bit 1
POR
CM1
DC
UA
—
(3)
(3)
PSSBD0
ECCP1M0
T2CKPS0
SWDTEN
TMR1ON
TMR3ON
CCP1M0
HLVDL0
PDC0
SSPM0
PCFG0
ADCS0
ABDEN
T0PS0
ADON
CVR0
SCS0
Bit 0
BOR
CM0
SEN
BF
C
(3)
(3)
DS39625C-page 77
---x xxxx
0000 0000 50, 149
xxxx xxxx 50, 149
1111 1111 50, 149
0000 q000
0-00 0101 50, 267
0q-1 11q0 50, 127
xxxx xxxx 50, 155
0000 0000 50, 155
0000 0000 50, 151
1111 1111 50, 158
-000 0000 50, 155
-000 0000 50, 157
xxxx xxxx 50, 195
0000 0000 50, 195
0000 0000 50, 197
0000 0000 50, 198
0000 0000 50, 199
xxxx xxxx 50, 256
xxxx xxxx 50, 256
--00 0000 50, 247
--00 0qqq 50, 248
0-00 0000 50, 249
xxxx xxxx 51, 168
xxxx xxxx 51, 168
--xx xxxx 51, 163
xxxx xxxx 51, 167
xxxx xxxx 51, 167
0000 0000 51, 168
01-0 0000 51, 230
0000 0000 51, 182
0000 0000 51, 183
0000 0000 51, 263
0000 0000 51, 257
xxxx xxxx 51, 161
xxxx xxxx 51, 161
0000 0000 51, 161
POR, BOR
--- ---0
Value on
on page:
50, 353
Details
50, 87
30, 50
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