PIC18LF4221-I/ML Microchip Technology, PIC18LF4221-I/ML Datasheet - Page 4

• Manufacturer Part Number: PIC18LF4221-I/ML
• Description: 4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4221-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2221/2321/4221/4321
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS39689F):
TABLE 23-1:
DS80285C-page 4
300001h
300002h
300003h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note 1:
Note:
File Name
2:
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3H MCLRE
CONFIG4L
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition.
Shaded cells are unimplemented, read as ‘0’.
Unimplemented in PIC18F2221/4221 devices; maintain these bits set.
See Register 23-14 for DEVID1 values. DEVID registers are read-only and cannot be programmed by the user.
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
CONFIGURATION BITS AND DEVICE IDs
(1)
(1)
DEBUG
DEV10
WRTD
DEV2
IESO
Bit 7
CPD
—
—
—
—
—
—
FCMEN
EBTRB
XINST
WRTB
DEV1
DEV9
Bit 6
CPB
—
—
—
—
—
—
BBSIZ1
WRTC
DEV0
DEV8
Bit 5
—
—
—
—
—
—
—
—
—
WDTPS3 WDTPS2 WDTPS1 WDTPS0
BBSIZ0
BORV1
REV4
DEV7
Bit 4
—
—
—
—
—
—
—
—
BORV0
FOSC3
REV3
DEV6
1. Module: Configuration Bits and Device IDs
Bit 3
—
—
—
—
—
—
—
—
Table 23-1: Configuration Bits and Device IDs,
on Page 253, has been changed to designate
Bit 3 of CONFIG4L as unimplemented.
The table is changed as shown.
LPT1OSC PBADEN CCP2MX
BOREN1 BOREN0 PWRTEN
FOSC2
REV2
DEV5
Bit 2
LVP
—
—
—
—
—
—
FOSC1
EBTR1
WRT1
REV1
DEV4
Bit 1
CP1
—
—
—
—
 2010 Microchip Technology Inc.
STVREN
WDTEN
FOSC0
EBTR0
WRT0
REV0
DEV3
Bit 0
CP0
—
—
—
Unprogrammed
00-- 0111
---1 1111
---1 1111
1--- -011
1000 -1-1
---- --11
11-- ----
---- --11
111- ----
---- --11
-1-- ----
xxxx xxxx
0000 1100
Default/
Value
(2)