PIC18LF4221-I/ML Microchip Technology, PIC18LF4221-I/ML Datasheet - Page 356

• Manufacturer Part Number: PIC18LF4221-I/ML
• Description: 4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4221-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2221/2321/4221/4321 FAMILY
FIGURE 27-7:
TABLE 27-9:
DS39689F-page 356
10
11
12
13
14
15
16
17
18
18A
19
20
20A
21
21A
22†
23†
Note 1:
Param
No.
Note:
(Output)
I/O pin
I/O pin
(Input)
OSC1
CLKO
† These parameters are asynchronous events not related to any internal clock edges.
TosH2ckL OSC1 ↑ to CLKO ↓
TosH2ckH OSC1 ↑ to CLKO ↑
TckR
TckF
TckL2ioV
TioV2ckH Port In Valid before CLKO ↑
TckH2ioI
TosH2ioV OSC1 ↑ (Q1 cycle) to Port Out Valid
TosH2ioI
TioV2osH Port Input Valid to OSC1 ↑ (I/O in setup time)
TioR
TioF
T
T
Symbol
INP
RBP
Measurements are taken in RC mode, where CLKO output is 4 x T
Refer to Figure 27-5 for load conditions.
CLKO AND I/O TIMING REQUIREMENTS
CLKO Rise Time
CLKO Fall Time
CLKO ↓ to Port Out Valid
Port In Hold after CLKO ↑
OSC1 ↑ (Q2 cycle) to
Port Input Invalid
(I/O in hold time)
Port Output Rise Time
Port Output Fall Time
INTx Pin High or Low Time
RB<7:4> Change INTx High or Low Time
Old Value
CLKO AND I/O TIMING
Q4
Characteristic
10
13
17
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
14
20, 21
Q1
19
0.25 T
18
Min
100
200
T
T
—
—
—
—
—
—
—
—
—
—
CY
0
0
CY
CY
+ 25
Q2
15
OSC
Typ
75
75
35
35
—
—
—
50
—
—
—
10
10
—
—
—
—
.
0.5 T
© 2009 Microchip Technology Inc.
Max
200
200
100
100
150
CY
25
60
25
60
—
—
—
—
—
—
—
11
12
+ 20
New Value
16
Units Conditions
Q3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
DD
DD
DD
= 2.0V
= 2.0V
= 2.0V