PIC18LF4450T-I/ML Microchip Technology, PIC18LF4450T-I/ML Datasheet - Page 98

• Manufacturer Part Number: PIC18LF4450T-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4450T-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2450/4450
8.6
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
REGISTER 8-10:
DS39760D-page 96
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
IPEN
2:
RCON Register
If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’. See Register 4-1 for additional information.
The actual Reset value of POR is determined by the type of device Reset. See Register 4-1 for additional
information.
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
SBOREN: BOR Software Enable bit
For details of bit operation, see Register 4-1.
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-1.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-1.
PD: Power-Down Detection Flag bit
For details of bit operation, see Register 4-1.
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-1.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-1.
SBOREN
R/W-1
RCON: RESET CONTROL REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
U-0
—
R/W-1
(2)
RI
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
R-1
PD
© 2008 Microchip Technology Inc.
x = Bit is unknown
R/W-0
POR
(2)
R/W-0
BOR
bit 0