PIC18LF4480-I/P Microchip Technology, PIC18LF4480-I/P Datasheet - Page 4
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18LF4480-I/P
Manufacturer Part Number
PIC18LF4480-I/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18LF2480-ISP.pdf
(14 pages)
Specifications of PIC18LF4480-I/P
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4480-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2480/2580/4480/4580
3. Module: ECCP
4. Module: EUSART
DS80496C-page 4
When operating either Timer1 or Timer3 as a
counter, with a prescale value other than 1:1 and
operating the ECCP in Compare mode with the
Special
CCP1M<3:0> = 1011), the Special Event
Trigger Reset of the timer occurs as soon as
there is a match between TMRxH:TMRxL and
CCPR1H:CCPR1L.
This differs from the PIC18F458, where the
Special Event Trigger Reset of the timer occurs
on the next rollover of the prescale counter, after
the
CCPR1H:CCPR1L.
Work around
To achieve the same timer Reset period as the
PIC18F458 devices, for a given clock source,
add 1 to the value in CCPR1H:CCPR1L. If
CCPR1H:CCPR1L = x
achieve
PIC18F2480/2580/4480/4580 device by using
CCPR1H:CCPR1L = x + 1, where the prescale is
1, 2, 4 or 8 (depending on the T1CKPS<1:0> bit
values).
Affected Silicon Revisions
When performing back-to-back transmission in
9-bit mode (TX9D bit in the TXSTA register is
set), an ongoing transmission’s timing can be
corrupted if the TX9D bit (for the next transmis-
sion) is not written immediately following the
setting of TXIF. This is because any write to the
TXSTA register results in a Reset of the Baud
Rate Generator which will effect any ongoing
transmission.
Work around
Load TX9D just after TXIF is set, either by poll-
ing TXIF or by writing TX9D at the beginning of
the Interrupt Service Routine. Alternately, only
write to TX9D when a transmission is not in
progress (TRMT = 1).
Affected Silicon Revisions
A1
A1
X
X
match
B0
B0
Event
the
B2
B2
between
same
Trigger
Reset
for
TMRxH:TMRxL
(CCP1CON
the
period
PIC18F458,
on
bits,
and
a
5. Module: Timer1/3
When Timer1/Timer3 is operating in 16-bit mode
and the prescale setting is not 1:1, a write to the
TMR1H/TMR3H Buffer registers may lengthen
the duration of the period between the incre-
ments of the timer for the period in which
TMR1H/TMR3H were written. It does not
change the actual prescale value.
Work around
Do not write to TMR1H/TMR3H while Timer1/
Timer3 is running, or else write to TMR1L/
TMR3L immediately following a write to
TMR1H/TMR3H.
Do not write to TMR1H/TMR3H and then wait
for another event before also updating
TMR1L/TMR3L.
Affected Silicon Revisions
A1
X
B0
B2
2010 Microchip Technology Inc.