PIC18LF8585-I/PT Microchip Technology, PIC18LF8585-I/PT Datasheet - Page 24
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PIC18LF8585-I/PT
Manufacturer Part Number
PIC18LF8585-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XK1.pdf
(496 pages)
3.PIC18F6585-IPT.pdf
(8 pages)
4.PIC18F6585-IPT.pdf
(38 pages)
5.PIC18F6585-IPT.pdf
(14 pages)
Specifications of PIC18LF8585-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3328 B
Interface Type
I2C, SPI, AUSART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163015
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC18LF8585-I/PTR
PIC18LF8585-I/PTR
PIC18LF8585-I/PTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF8585-I/PT
Manufacturer:
Microchip
Quantity:
130
Company:
Part Number:
PIC18LF8585-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18FXX80/XX85
4.3
A configuration address may be read and output on
PGD via the 4-bit command, ‘1001’. Configuration data
is read and written in a byte-wise fashion, so it is not
necessary to merge two bytes into a word prior to a
compare. The result may then be immediately
compared to the appropriate configuration data in the
programmer’s memory for verification. Refer to
Section 4.1 “Read Code Memory, ID Locations and
Configuration Bits” for implementation details of
reading configuration data.
4.4
Data EEPROM is accessed one byte at a time via an
Address Pointer (register pair, EEADR:EEADRH) and
a data latch (EEDATA). Data EEPROM is read by load-
ing EEADR:EEADRH with the desired memory location
and initiating a memory read by appropriately configur-
ing the EECON1 register. The data will be loaded into
EEDATA, where it may be serially output on PGD via
the 4-bit command, ‘0010’ (Shift Out Data Holding
register). A delay of P6 must be introduced after the
falling edge of the 8th PGC of the operand to allow
PGD to transition from an input to an output. During this
time, PGC must be held low (see Figure 4-4).
The command sequence to read a single byte of data
is shown in Table 4-2.
TABLE 4-2:
DS39606E-page 24
Step 1: Direct access to data EEPROM.
Step 2: Set the data EEPROM Address Pointer.
Step 3: Initiate a memory read.
Step 4: Load data into the Serial Data Holding register.
Note 1:
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
0010
4-Bit
Verify Configuration Bits
Read Data EEPROM Memory
The <LSB> is undefined. The <MSB> is the data.
9E A6
9C A6
0E <Addr>
6E A9
OE <AddrH>
6E AA
80 A6
50 A8
6E F5
<LSB><MSB>
READ DATA EEPROM MEMORY
Data Payload
BCF
BCF
MOVLW <Addr>
MOVWF EEADR
MOVLW <AddrH>
MOVWF EEADRH
BSF
MOVF
MOVWF TABLAT
Shift Out Data
EECON1, EEPGD
EECON1, CFGS
EECON1, RD
EEDATA, W, 0
(1)
FIGURE 4-3:
Core Instruction
No
Move to TABLAT
READ DATA EEPROM
FLOW
Shift Out Data
2010 Microchip Technology Inc.
Address
Read
Done
Byte
Start
Done
Set
?
Yes