RFPIC12F675FT-I/SS Microchip Technology, RFPIC12F675FT-I/SS Datasheet - Page 38
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RFPIC12F675FT-I/SS
Manufacturer Part Number
RFPIC12F675FT-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC®r
Specifications of RFPIC12F675FT-I/SS
Rohs Compliant
YES
Frequency
380MHz ~ 450MHz
Applications
RKE, Security Systems
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
40 kbps
Power - Output
10dBm
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
1024 x 14 words Flash, 128 x 8 Byte EEPROM, 64 x 8 Byte SRAM
Voltage - Supply
2V ~ 5.5V
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Processor Series
RFPIC12F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
1024 B
Data Ram Size
64 B
Interface Type
USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000, DV164102, AC164101, AC164103
Minimum Operating Temperature
- 40 C
On-chip Adc
4 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164103 - MODULE RCVR RFPIC 433MHZAC164101 - MODULE TRANSMITTER RFPIC 433MHZDV164102 - KIT DEV RFPICKIT KIT 1AC124002 - MOD SKT PROMATEII 18SOIC/20SSOP
Features
-
Lead Free Status / Rohs Status
Details
Other names
RFPIC12F675FT-ISS
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
RFPIC12F675FT-I/SS
Manufacturer:
MICROCHIP
Quantity:
12 000
rfPIC12F675
6.3
A simplified circuit for an analog input is shown in
Figure 6-3. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
and V
V
FIGURE 6-3:
6.4
The comparator output, COUT, is read through the
CMCON register. This bit is read-only. The comparator
output may also be directly output to the GP2 pin in
three of the eight possible modes, as shown in
Figure 6-2. When in one of these modes, the output on
GP2 is asynchronous to the internal clock. Figure 6-4
shows the comparator output block diagram.
FIGURE 6-4:
DS70091A-page 36
SS
and V
SS
. The analog input, therefore, must be between
Analog Input Connection
Considerations
Comparator Output
To GP2/T0CKI pin
DD
. If the input voltage deviates from this
VA
Legend:
To Data Bus
Rs < 10K
Set CMIF bit
ANALOG INPUT MODE
MODIFIED COMPARATOR OUTPUT BLOCK DIAGRAM
RD CMCON
A
IN
C
V
I
R
R
VA
LEAKAGE
T
PIN
IC
S
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to Various Junctions
= Interconnect Resistance
= Source Impedance
= Analog Voltage
Preliminary
Q
Q
DD
V
DD
EN
EN
V
V
D
D
T
T
= 0.6V
= 0.6V
RESET
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latchup may occur. A
maximum
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
The TRISIO<2> bit functions as an output enable/
disable for the GP2 pin while the comparator is in an
Output mode.
RD CMCON
Note 1: When reading the GPIO register, all pins
2: Analog levels on any pin that is defined as
Leakage
±500 nA
Vss
configured as analog inputs will read as a
‘0’. Pins configured as digital inputs will
convert an analog input according to the
TTL input specification.
a digital input, may cause the input buffer
to consume more current than is
specified.
source
CINV
R
IC
impedance
2003 Microchip Technology Inc.
CM2:CM0
GP0/CIN+
GP1/CIN-
CV
of
REF
10 kΩ
is