RFPIC12F675KT-I/SS Microchip Technology, RFPIC12F675KT-I/SS Datasheet - Page 19

• Manufacturer Part Number: RFPIC12F675KT-I/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of RFPIC12F675KT-I/SS

• Rohs Compliant: YES
• Frequency: 850MHz ~ 950MHz
• Applications: RKE, Security Systems
• Modulation Or Protocol: ASK, FSK
• Data Rate - Maximum: 40 kbps
• Power - Output: 10dBm
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1024 x 14 words Flash, 128 x 8 Byte EEPROM, 64 x 8 Byte SRAM
• Voltage - Supply: 2V ~ 5.5V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Processor Series: RFPIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1024 B
• Data Ram Size: 64 B
• Interface Type: USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000, DV164102, AC164101, AC164103
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164104 - MODULE RCVR RFPIC 315MHZAC164102 - MODULE TRANSMITTER RFPIC 315MHZAC124002 - MOD SKT PROMATEII 18SOIC/20SSOP
• Features: -
• Lead Free Status / Rohs Status: Details
• Other names: RFPIC12F675KT-ISS

3.0
There are as many as six general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
3.1
GPIO is an 6-bit wide, bi-directional port. The
corresponding data direction register is TRISIO.
Setting a TRISIO bit (= 1) will make the corresponding
GPIO pin an input (i.e., put the corresponding output
driver in a Hi-impedance mode). Clearing a TRISIO bit
(= 0) will make the corresponding GPIO pin an output
(i.e., put the contents of the output latch on the selected
pin). The exception is GP3, which is input only and its
TRISIO bit will always read as ‘1’. Example 3-1 shows
how to initialize GPIO.
Reading the GPIO register reads the status of the pins,
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. There-
fore, a write to a port implies that the port pins are read,
this value is modified, and then written to the port data
latch. GP3 reads ‘0’ when MCLREN = 1.
The TRISIO register controls the direction of the
GP pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISIO
REGISTER 3-1:
 2003 Microchip Technology Inc.
Note:
GPIO PORT
GPIO and the TRISIO Registers
bit 7-6:
bit 5-0:
Additional information on I/O ports may be
found in the PICmicro™ Mid-Range Refer-
ence Manual (DS33023)
GPIO — GPIO REGISTER (ADDRESS: 05h)
Unimplemented: Read as ’0’
GPIO<5:0>: General Purpose I/O pin.
1 = Port pin is >V
0 = Port pin is <V
bit 7
Legend:
R = Readable bit
- n = Value at POR
U-0
—
U-0
—
IH
IL
GPIO5
R/W-x
Preliminary
W = Writable bit
’1’ = Bit is set
GPIO4
R/W-x
register are maintained set when using them as analog
inputs. I/O pins configured as analog inputs always
read ‘0’.
EXAMPLE 3-1:
3.2
Every GPIO pin on the rfPIC12F675 has an interrupt-
on-change option and every GPIO pin, except GP3,
has a weak pull-up option. The next two sections
describe these functions.
3.2.1
Each of the GPIO pins, except GP3, has an individually
configurable weak internal pull-up. Control bits WPUx
enable or disable each pull-up. Refer to Register 3-3.
Each weak pull-up is automatically turned off when the
port pin is configured as an output. The pull-ups are
disabled on a Power-on Reset by the GPPU bit
(OPTION<7>).
bcf
clrf
movlw
movwf
bsf
clrf
movlw
movwf
Note:
Additional Pin Functions
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
STATUS,RP0
GPIO
07h
CMCON
STATUS,RP0
ANSEL
0Ch
TRISIO
GPIO3
R/W-x
The ANSEL (9Fh) and CMCON (19h)
registers (9Fh) must be initialized to
configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’.
WEAK PULL-UP
rfPIC12F675
INITIALIZING GPIO
GPIO2
R/W-x
;Bank 0
;Init GPIO
;Set GP<2:0> to
;digital IO
;Bank 1
;Digital I/O
;Set GP<3:2> as inputs
;and set GP<5:4,1:0>
;as outputs
x = Bit is unknown
GPIO1
R/W-x
DS70091A-page 17
GPIO0
R/W-x
bit 0