HMC5843-TR Honeywell Microelectronics & Precision Sensors, HMC5843-TR Datasheet - Page 16

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HMC5843-TR

Manufacturer Part Number
HMC5843-TR
Description
SENSOR MAGNETIC 3 AXIS 20-LCC
Manufacturer
Honeywell Microelectronics & Precision Sensors
Series
HMCr
Type
Compass - Three Axisr
Datasheet

Specifications of HMC5843-TR

Sensing Range
±4g
Voltage - Supply
2.5 V ~ 3.3 V
Current - Supply
80µA
Output Type
Differential Voltage
Features
Compass - Three Axis
Operating Temperature
-30°C ~ 80°C
Package / Case
20-LCC
Pin Count
20
Screening Level
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output (max)
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
342-1071-2
HMC5843
HMC5843
Data Output Z Registers A and B
The data output Z registers are two 8-bit registers, data output register A and data output register B. These registers
store the measurement result from channel Z. Data output Z register A contains the MSB from the measurement result,
and data output Z register B contains the LSB from the measurement result. The value stored in these two registers is a
16-bit value in 2’s complement form, whose range is 0xF800 to 0x07FF. DZRA0 through DZRA7 and DZRB0 through
DZRB7 indicate bit locations, with DZRA and DZRB denoting the bits that are in the data output Z registers. DZRA7 and
DZRB7 denote the first bit of the data stream. The number in parenthesis indicates the default value of that bit.
In the event the ADC reading overflows or underflows for the given channel, or if there is a math overflow during the bias
measurement, this data register will contain the value -4096 in 2’s complement form. This register value will clear when
after the next valid measurement is made.
Data Output Register Operation
When one or more of the output registers are read, new data cannot be placed in any of the output data registers until all
six data output registers are read. This requirement also impacts DRDY and RDY, which cannot be cleared until new
data is placed in all the output registers.
Status Register
The status register is an 8-bit read-only register. This register is used to indicate device status. SR0 through SR7
indicate bit locations, with SR denoting the bits that are in the status register. SR7 denotes the first bit of the data stream.
16
DYRA7
(0)
DYRB7
(0)
DZRA7
(0)
DZRB7
(0)
SR7
(0)
DZRA6
(0)
DZRB6
(0)
DYRA6
(0)
DYRB6
(0)
SR6
(0)
Table 15: Data Output Y Registers A and B
Table 16: Data Output Z Registers A and B
SR5
(0)
DZRA5
(0)
DZRB5
DYRA5
(0)
DYRB5
(0)
(0)
Table 17: Status Register
SR4
(0)
DZRA4
(0)
DZRB4
(0)
DYRA4
(0)
DYRB4
(0)
SR3
(0)
DZRA3
(0)
DZRB3
(0)
DYRA3
(0)
DYRB3
(0)
SR2
REN (0)
DYRA2
(0)
DYRB2
(0)
DZRA2
(0)
DZRB2
(0)
SR1
LOCK (0)
DZRA1
(0)
DZRB1
(0)
DYRA1
(0)
DYRB1
(0)
SR0
RDY(0)
DZRA0
(0)
DZRB0
(0)
DYRA0
(0)
DYRB0
(0)
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