ST8024LCDR STMicroelectronics, ST8024LCDR Datasheet - Page 16

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ST8024LCDR

Manufacturer Part Number
ST8024LCDR
Description
IC INTERFACE SMART CARD 28SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST8024LCDR

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STM32 Cortex-M3 Companion Products
Applications
Smart Card Reader, Writer
Voltage - Supply
2.7 V ~ 6.5 V
Package / Case
28-SOIC (0.300", 7.50mm Width)
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-

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Functional description
5
5.1
5.2
5.2.1
16/33
Functional description
Throughout this document it is assumed that the reader is familiar with ISO7816
terminology.
Power supply
The supply pins for the IC are V
signals interfacing with the system controller are referred to V
supply the system controller. All card reader contacts remain inactive during power-on or
power-off.
The internal circuits are maintained in the reset state until V
the duration of the internal Power-on reset pulse, t
V
A step-up converter is incorporated to generate the 1.8 V (for those devices with the
1.8V pin), 3 V or 5 V card supply voltage (V
separately by V
100 nF capacitors of the step-up converter should be located as near as possible to the IC
and have an ESR less than 350 mΩ.
Supply voltages V
After powering the device, OFF remains low until CMDVCC is set high.
During power-off, OFF falls low when V
Voltage supervisor
Without external divider on pin PORADJ
The voltage supervisor surveys the V
(t
(see
As long as V
command lines. This state also lasts for the duration of t
higher than V
contacts is performed.
Figure 4.
W
th2
) is used internally to keep the IC inactive during power-on or power-off of the V
, an automatic deactivation of the contacts is performed.
Figure
4).
DD
Voltage supervisor
th2
DDP
is less than V
+ V
DD
and PGND. Due to the possibility of large transient currents, the two
hys2
and V
. When V
DDP
th2
Doc ID 17709 Rev 3
may be applied to the IC in any sequence.
DD
+ V
DD
and GND. V
hys2
falls below V
DD
DD
, the IC remains inactive whatever the levels on the
supply. A defined reset pulse of approximately 8 ms
is below the falling threshold voltage.
CC
). The step-up converter should be supplied
DD
th2
W
should be in the range of 2.7 to 6.5 V. All
, a deactivation sequence of the
(see
W
Figure
after V
DD
DD
reaches V
, therefore V
4). When V
DD
has reached a level
th2
DD
DD
+V
hys2
falls below
should also
DD
ST8024L
and for
supply
CS17790

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