MCZ33905BS5EK Freescale Semiconductor, MCZ33905BS5EK Datasheet - Page 41
MCZ33905BS5EK
Manufacturer Part Number
MCZ33905BS5EK
Description
IC SBC CAN HS 5.0V 32SOIC
Manufacturer
Freescale Semiconductor
Datasheet
1.MCZ33904A5EKR2.pdf
(98 pages)
Specifications of MCZ33905BS5EK
Applications
System Basis Chip
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 27 V
Package / Case
*
Mounting Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCZ33905BS5EK
Manufacturer:
FREESCALE
Quantity:
20 000
V
biasing of external contact swicthes. The contact switch state
can be detected via I/O-1, -2, and -3, and device can wake-
up from either LP mode.
closed contact switch in order to minimize consumption via
the contact pull-up resistor.
Principle
from 3.0 to 512 ms (selection in timer B).
duration of T
Analog Integrated Circuit Device Data
Freescale Semiconductor
DD
This function can be used in both Low Power (LP) modes:
Cyclic sense is the periodic activation of I/O-0 to allow
Cyclic sense is optimized and designed primarily for
A dedicated timer allows to select a cyclic sense period
At end of the period, the I/O-0 will be activated for a
OFF and V
NORMAL MODE
I/O-0 high side active in Normal mode
S3
Upon entering in LP mode, all 3
I/O-0
I/O-1
S1
_CSON
contact switches are closed.
R
Cyclic sense active time
S2
DD
R
ON.
(SPI selectable in INIT register, to 200 μs,
S1
Cyclic sense period
R
Figure 23. Cyclic Sense Operation - Switch to GND, Wake-up by Open Switch
S1 closed
CYCLIC SENSE OPERATION DURING LOW POWER MODES
LOW POWER MODE
I/O-1
I/O-0
I/O-2
I/O-3
I/O-0 high side active during cyclic sense active time
S1 open
state of I/O-1 low => no wake-up
High level is detected on I/O-x, and device wakes up.
In LP mode, 1 contact switch is open.
RESET or NORMAL REQUEST MODE
S3
Wake-up detected.
R
I/O-1 high => wake-up
S2
R
S1
400 μs, 800 μs, or 1.6 ms). The I/O-0 high side transistor or
low side transistor can be activated. The selection is done by
the state of I/O-0 prior to enter in low power mode.
of them is high, the device will detect a wake-up.
to enter in device low power mode. Upon entering LP mode,
I/O-0 should be activated.
is deglitched for a duration of typ 30 μs. This mean that I/O-1
should be in the expected state for a duration longer than the
deglitcher time.
operation, with I/O-0 high side active and I/O-1 wake-up in
case of high level.
R
During the T
Cyclic sense period is selected by SPI configuration prior
The level of I/O-1 is sense during the I/O-0 active time, and
The diagram below
CYCLIC SENSE OPERATION DURING LOW POWER MODES
-CSON
I/O-0
I/O-1
I/O-2
I/O-3
I/O-0
I/O-1
duration, the I/O-x are monitored. If one
Zoom
(Figure
FUNCTIONAL DEVICE OPERATION
Wake-up event detected
23) illustrates the cyclic sense
I/O-1 deglitcher time
Cyclic sense active
time (ex 200 us)
(typ 30 us)
(Figure
33903/4/5
23).
41