C500BC031 Omron, C500BC031 Datasheet - Page 145
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C500BC031
Manufacturer Part Number
C500BC031
Description
BACKPLANE
Manufacturer
Omron
Datasheet
1.C500BC031.pdf
(168 pages)
Specifications of C500BC031
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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constant
control bit
Control System
controlled system
control signal
counter
CPU
CPU Backplane
CPU Rack
crystal optical fiber cable
CTS
cycle
cycle time
data area
data area boundary
data sharing
debug
An operand for which the actual numeric value is specified by the user, and
which is then stored in a particular address in the data memory.
A bit in a memory area that is set either through the program or via a Pro-
gramming Device to achieve a specific purpose, e.g., a Restart bit is turned
ON and OFF to restart a Unit.
All of the hardware and software components used to control other devices.
A Control System includes the PC System, the PC programs, and all I/O de-
vices that are used to control or obtain feedback from the controlled system.
The devices that are being controlled by a PC System.
A signal sent from the PC to effect the operation of the controlled system.
Either a dedicated number of digits or words in memory used to count the
number of times a specific process has occurred or a location in memory ac-
cessed through a TC bit and used to count the number of times the status of
a bit or an execution condition has changed from OFF to ON.
An acronym for central processing unit. In a PC System, the CPU executes
the program, processes I/O signals, communicates with external devices,
etc.
A Backplane used to create a CPU Rack.
Part of a building-block PC, the CPU Rack contains the CPU, a power sup-
ply, and other Units. With most PCs, the CPU Rack is the only Rack that pro-
vides linkable slots.
See AGF.
An acronym for clear-to-send, a signal used in communications between
electronic devices to indicate that the receiver is ready to accept incoming
data.
The process used to execute a ladder-diagram program. The program is ex-
amined sequentially from start to finish and each instruction is executed in
turn based on execution conditions.
The time required for a single cycle of the ladder-diagram program.
An area in the PC’s memory that is designed to hold a specific type of data,
e.g., the LR area is designed to hold common data in a PC Link System.
Memory areas that hold programs are not considered data areas.
The highest address available in a data area. When designating an operand
that requires multiple words, it is necessary that the highest address in the
data area is not exceeded.
An aspect of PC Link Systems and of Data Links in Net Link Systems in
which common data areas or common data words are created between two
or more PCs.
A process by which a draft program is corrected until it operates as intended.
Debugging includes both removal of syntax errors, as well as fine-tuning of
timing and coordination of control operations.
Glossary
129
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