ADS-932MM Murata Power Solutions Inc, ADS-932MM Datasheet - Page 5

• Manufacturer Part Number: ADS-932MM
• Description: Analog To Digital Converter
• Manufacturer: Murata Power Solutions Inc

CALIBRATION PROCEDURE
DATEL
Complementary Offset Binary
Offset Binary
Complementary Two’s Complement (Using MSB, pin 29)
Two’s Complement (Using MSB, pin 29)
Straight Binary
Complementary Binary
Connect the converter per Figure 2. Any offset/gain calibration procedures
A/D converters are calibrated by positioning their digital outputs exactly
For the ADS-932, offset adjusting is normally accomplished when the ana-
Gain adjusting is accomplished when the analog input is at nominal full
Note: Connect pin 5 to ANALOG GROUND (pin 4) for operation without
should not be implemented until the device is fully warmed up. To avoid
interaction, adjust offset before gain. The ranges of adjustment for the
circuits in Figure 2 are guaranteed to compensate for the ADS-932’s initial
accuracy errors and may not be able to compensate for additional system
errors.
on the transition point between two adjacent digital output codes. This is
accomplished by connecting LED's to the digital outputs and performing
adjustments until certain LED's "fl icker" equally between on and off. Other
approaches employ digital comparators or microcontrollers to detect when
the outputs change from one code to the next.
log input is 0 minus ½ LSB (–42μV). See Table 2b for the proper bipolar
output coding.
scale minus 1½ LSB's (+2.749874V).
zero/offset adjustment. Connect pin 6 to pin 4 for operation without gain
adjustment.
®
Table 2a. Setting Output Coding Selection (Pin 35)
OUTPUT FORMAT
CONNECT for UNIPOLAR MODE
®
+5V
–5V
+5V
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PIN 35 LOGIC LEVEL
4.7 F
4.7 F
4.7 F
0.1 F
6.8 F
0.1 F
0.1 F
1
0
1
0
1
0
0.1 F
4.7 F
Figure 2. Bipolar Connection Diagram
4, 36
10
31
7, 30
38
37
2
11
1
34
8
+5V
+5V ANALOG
ANALOG
GROUND
ENABLE
FIFO/DIR
FSTAT1
UNIPOLAR
FSTAT2
+3.2V
REF. OUT
+5V
DIGITAL
DIGITAL
GROUND
–5V
ADJUST
GAIN
20k
6
–5V
ADS-932
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin 12) so that the
2. For unipolar or bipolar zero/offset adjust, apply –42μV to the ANALOG
3. For bipolar inputs, adjust the offset potentiometer until the code fl ickers
4. Two's complement coding requires using BIT 1 (MSB) (pin 29). With pin 35
Gain Adjust Procedure
1. Apply +2.749874V to the ANALOG INPUT (pin 3).
2. For bipolar inputs, adjust the gain potentiometer until all output bits are 0’s
3. Two's complement coding requires using BIT 1 (MSB) (pin 29). With pin
+5V
converter is continuously converting.
INPUT (pin 3).
between 1000 0000 0000 0000 and 0111 1111 1111 1111 with pin 35
tied high (complementary offset binary) or between 0111 1111 1111 1111
and 1000 0000 0000 0000 with pin 35 tied low (offset binary). For unipo-
lar inputs, adjust the offset potentiometers until all output bits are 0's and
the LSB fl ickers between 0 and 1 with Pin 35 tied high (straight binary) or
until all bits are 1's and the LSB fl ickers between 0 and 1 with pin 35 tied
low (complementary binary).
tied low, adjust the trimpot until the output code fl ickers between all 0’s
and all 1’s.
and the LSB fl ickers between a 1 and 0 with pin 35 tied high (comple-
mentary offset binary) or until all output bits are 1’s and the LSB fl ickers
between a 1 and 0 with pin 35 tied low (offset binary).
35 tied low, adjust the gain trimpot until the output code fl ickers equally
between 0111 1111 1111 1111 and 0111 1111 1111 1110.
START CONVERT
ANALOG INPUT
OFFSET
ADJUST
20k
COMP. BITS
FIFO READ
5
–5V
12
35
3
9
16-Bit, 2 MHz Sampling A/D Converters
33
32
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
+5V
OVERFLOW
EOC
BIT 1 (MSB)
BIT 1 (MSB)
BIT2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14
BIT 15
BIT 16 (LSB)
MDA_ADS-932.B03 Page 5 of 9
ADS-932