ST230C14C1L Vishay, ST230C14C1L Datasheet - Page 2
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ST230C14C1L
Manufacturer Part Number
ST230C14C1L
Description
SILICON CONTROLLED RECTIFIER,1.4kV V(DRM),410A I(T),TO-200AB
Manufacturer
Vishay
Datasheet
1.ST230C04C0.pdf
(7 pages)
Specifications of ST230C14C1L
Rated Repetitive Off-state Voltage Vdrm
1400 V
Off-state Leakage Current @ Vdrm Idrm
30 mA
Holding Current (ih Max)
600 mA
Mounting Style
SMD/SMT
Package / Case
TO-200AB
Breakover Current Ibo Max
5970 A
Gate Trigger Current (igt)
150 mA
Gate Trigger Voltage (vgt)
3 V
Repetitive Peak Forward Blocking Voltage
1400 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ST230CPbF Series
Vishay High Power Products
www.vishay.com
2
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Maximum (typical) latching current
SWITCHING
PARAMETER
Maximum non-repetitive rate of rise
of turned-on current
Typical delay time
Typical turn-off time
BLOCKING
PARAMETER
Maximum critical rate of rise
of off-state voltage
Maximum peak reverse and
off-state leakage current
2
2
t for fusing
√t for fusing
For technical questions, contact: ind-modules@vishay.com
SYMBOL
SYMBOL
SYMBOL
V
V
I
(Hockey PUK Version), 410 A
T(RMS)
dV/dt
I
I
I
dI/dt
I
T(TO)1
T(TO)2
V
RRM
T(AV)
I
DRM
TSM
I
2
r
r
I
I
t
t
2
TM
t1
t2
H
√t
L
d
q
t
Phase Control Thyristors
,
T
T
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x π x I
(I > π x I
(16.7 % x π x I
(I > π x I
I
T
Gate drive 20 V, 20 Ω, t
T
Gate current 1 A, dI
V
I
V
TM
pk
J
J
J
J
d
R
= T
= T
= 25 °C, anode supply 12 V resistive load
= T
= 0.67 % V
= 880 A, T
= 50 V, dV/dt = 20 V/µs, gate 0 V 100 Ω, t
= 300 A, T
J
J
J
maximum linear to 80 % rated V
maximum, anode voltage ≤ 80 % V
maximum, rated V
T(AV)
T(AV)
), T
), T
J
DRM
No voltage
reapplied
100 % V
reapplied
No voltage
reapplied
100 % V
reapplied
J
T(AV)
T(AV)
= T
= T
J
J
TEST CONDITIONS
TEST CONDITIONS
TEST CONDITIONS
= T
= T
, T
J
J
< I < π x I
< I < π x I
maximum, t
g
J
maximum, dI/dt = 20 A/µs,
/dt = 1 A/µs
J
J
= 25 °C
maximum
maximum
RRM
RRM
r
≤ 1 µs
DRM
T(AV)
T(AV)
Sinusoidal half wave,
initial T
/V
p
RRM
= 10 ms sine pulse
), T
), T
applied
J
J
J
= T
= T
= T
DRM
J
J
J
DRM
maximum
maximum
maximum
p
= 500 µs
Document Number: 94398
1000 (300)
410 (165)
VALUES
VALUES
VALUES
Revision: 11-Aug-08
55 (85)
1000
5700
5970
4800
5000
1630
0.92
0.98
0.88
0.81
1.69
100
500
780
163
148
115
105
600
1.0
30
UNITS
UNITS
UNITS
kA
kA
V/µs
A/µs
mΩ
mA
mA
°C
µs
A
A
V
V
2
2
√s
s