AD9125-M5372-EBZ Analog Devices Inc, AD9125-M5372-EBZ Datasheet - Page 5

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AD9125-M5372-EBZ

Manufacturer Part Number
AD9125-M5372-EBZ
Description
16-BIT DAC Evaluation Board
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD9125-M5372-EBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
DAC
Kit Application Type
Data Converter
Silicon Core Number
AD9125
Features
Come With Clocking And Analog Quadrature Modulator Circuits
Kit Contents
Quick Start Guide, Board, Software Updates
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DIGITAL SPECIFICATIONS
T
otherwise noted.
Table 2.
Parameter
CMOS DATA INPUTS
SERIAL PORT OUTPUT LOGIC LEVELS
SERIAL PORT INPUT LOGIC LEVELS
DACCLK INPUT (DACCLKP, DACCLKN)
REFCLK INPUT (REFCLKP, REFCLKN)
SERIAL PERIPHERAL INTERFACE
LATENCY AND POWER-UP TIMING SPECIFICATIONS
Table 3.
Parameter
LATENCY (DACCLK Cycles)
MIN
Input V
Input V
Maximum Bus Speed
Output V
Output V
Input V
Input V
Differential Peak-to-Peak Voltage
Common-Mode Voltage
Maximum Clock Rate
Differential Peak-to-Peak Voltage
Common-Mode Voltage
REFCLKx Frequency, PLL Mode
REFCLKx Frequency, SYNC Mode
Maximum Clock Rate (SCLK)
Minimum Pulse Width High (t
Minimum Pulse Width Low (t
Setup Time, SDI to SCLK (t
Hold Time, SDI to SCLK (t
Data Valid, SDO to SCLK (t
Setup Time, CS to SCLK (t
1× Interpolation (with or Without Modulation)
2× Interpolation (with or Without Modulation)
4× Interpolation (with or Without Modulation)
8× Interpolation (with or Without Modulation)
Inverse Sinc
Fine Modulation
Power-Up Time
to T
MAX
IN
IN
IN
IN
Logic High
Logic Low
OUT
OUT
Logic High
Logic Low
, AVDD33 = 3.3 V, IOVDD = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, I
Logic High
Logic Low
DH
D CS
DV
DS
)
)
)
)
PWOL
PWH
)
)
Conditions
IOVDD = 1.8 V
IOVDD = 2.5 V
IOVDD = 3.3 V
IOVDD = 1.8 V
IOVDD = 2.5 V
IOVDD = 3.3 V
IOVDD = 1.8 V
IOVDD = 2.5 V
IOVDD = 3.3 V
IOVDD = 1.8 V
IOVDD = 2.5 V
IOVDD = 3.3V
Self biased input, ac couple
1 GHz ≤ f
See the Multichip Synchronization section for conditions
VCO
≤ 2.1 GHz
Rev. 0 | Page 5 of 56
OUTFS
Min
= 20 mA, maximum sample rate, unless
Typ
64
135
292
608
20
8
260
Min
1.2
250
1.4
1.8
2.0
1.2
1.6
2.4
100
1000
100
15.625
0
40
1.9
0.2
2.3
Max
Typ
1.4
500
1.25
500
1.25
Max
0.4
0.4
0.4
0.6
0.8
0.8
600
12.5
12.5
0.6
2000
2000
600
Unit
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
ms
AD9125
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
MHz
mV
V
MHz
mV
V
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns

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