AD9552/PCBZ Analog Devices Inc, AD9552/PCBZ Datasheet - Page 28

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AD9552/PCBZ

Manufacturer Part Number
AD9552/PCBZ
Description
Oscillator Frequency Upconverter Eval Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9552/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
PLL Clock Generator
Kit Application Type
Clock & Timing
Silicon Core Number
AD9552
Design Resources
Clock Distribution Circuit with Pin-Programmable Output Frequency, Output Logic Levels, and Fanout (CN0152)
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9552
Primary Attributes
6.6 MHz ~ 112.5 MHz Input
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9552
OUT1 Driver Control (Register 0x32)
Table 24.
Address
0x32
Select OUT2 Source Control (Register 0x33)
Table 25.
Address
0x33
Bit
[7:4]
3
[2:0]
Bit
7
6
[5:3]
[2:1]
0
Bit Name
Unused
OUT2 source
Unused
Bit Name
OUT1 drive strength
OUT1 power-down
OUT1 mode control
OUT1 CMOS polarity
Enable SPI control of OUT1
driver control
Description
Controls the output drive capability of the OUT1 driver.
0 = weak.
1 = strong (default).
Controls power-down functionality of the OUT1 driver.
0 = OUT1 active (default).
1 = OUT1 powered down.
OUT1 driver mode selection.
000 = CMOS, both pins active.
001 = CMOS, positive pin active, negative pin tristate.
010 = CMOS, positive pin tristate, negative pin active.
011 = CMOS, both pins tristate.
100 = LVDS.
101 = LVPECL (default).
110 = not used.
111 = not used.
Selects the polarity of the OUT1 pins in CMOS mode.
00 = positive pin logic is true = 1, false = 0/negative pin logic is true = 0, false = 1 (default).
01 = positive pin logic is true = 1, false = 0/negative pin logic is true = 1, false = 0.
10 = positive pin logic is true = 0, false = 1/negative pin logic is true = 0, false = 1.
11 = positive pin logic is true = 0, false = 1/negative pin logic is true = 1, false = 0.
These bits are ineffective unless Bits[5:3] select CMOS mode.
Controls OUT1 driver functionality.
0 = OUT1 is LVDS or LVPECL, per the OUTSEL pin (Pin 15) (default).
1 = OUT1 functionality defined by Bits[7:1].
Description
Unused.
Selects the signal source for OUT2.
0 = source for OUT2 is the output of the P
1 = source for OUT2 is the input reference (REF or XTAL).
Unused.
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1
divider (default).

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