ADD-FLOATALL Altera, ADD-FLOATALL Datasheet
ADD-FLOATALL
Specifications of ADD-FLOATALL
Related parts for ADD-FLOATALL
ADD-FLOATALL Summary of contents
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... Altera Product Catalog Version 9.0 ...
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Contents Glossary.. . ......................................................... 2 Stratix .FPGA.series. . ....................................... 3 ® HardCopy .ASIC.Series. . ................................. 15 ® Arria .FPGA.Series. . ....................................... 19 ® Cyclone .FPGA.Series.................................... 25 ® MAX .CPLD.Series......................................... 35 ® Quartus .II.Software...................................... 39 ® Embedded.Processing.................................... 42 Intellectual.Property. . ..................................... ...
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... With Altera you get a complete design environment and a wide choice of design tools, built to work together easily so your designs are up and running fast. You can try one of our training classes to get a jump start on your designs. Choose Altera and see how we will enhance your productivity and make a difference to your bottom line. ...
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... This capability enables you to configure the FPGA using the existing PCI Express Configuration via PCIe (CvPCIe) application, reducing configuration time to under 100 ms. These metal-programmable hard IP blocks deliver up to 14M ASIC gates 700K additional logic Embedded HardCopy Blocks elements (LEs) to harden standard or logic-intensive applications. ...
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... The following features, packages, and I/O matrices give you an overview of our devices. To get the full story, check out our online selector guide: www.altera.com/selector. 5SGXA3 ALMs 75,500 Equivalent LEs 200,000 Registers 302,000 2 M20K memory blocks 800 MLAB memory (Mb) 2.3 Embedded memory ...
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... Transceiver (SERDES) channels (14.1 Gbps) PCIe hard IP blocks 100GbE hard IP blocks Memory devices supported All data is preliminary 1 3.3-V compliant, requires a 3.0-V power supply 2 4 Altera Product Catalog 2011 www.altera.com • • Stratix V GS and E FPGAs (0.85 V 14.1-Gbps Transceivers 5SGSD3 5SGSD4 5SGSD5 89,000 ...
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... Available in industrial temperatures only ( 100 C). 1 This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases total register count by an additional 50 percent. 2 3.3 V compliant, requires a 3-V power supply. 3 The total transceiver count is the sum of 11.3-Gbps plus 8.5-Gbps plus 6.5-Gbps transceivers. ...
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... IP blocks for the product line shown.Various packages offer a variety of options to meet your design needs. This is the base core logic register count. The ALM can support three registers when used 2 in LUTREG mode, which increases the total register count by an additional 50 percent. EP4SGX360N has 1,024 18x18 multipliers ...
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... Embedded DPA circuitry Series and differential OCT Memory devices supported This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which can increase the total register count by an additional 50 percent 3.3 V compliant, requires a 3-V power supply. ...
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... Series and differential OCT Memory devices supported 1 This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases the total register count by an additional 50 percent. The size of the MLAB ROM is twice the size of the MLAB RAM. 2 ...
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... Series and differential OCT Memory devices supported This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases the total register count by an additional 50 percent. 1 The size of the MLAB ROM is twice the size of the MLAB RAM. ...
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... Maximum PLLs/unique outputs, LVDS channels, and transceiver channels for the product line shown. Various packages offer a variety of options to meet your design needs. 1 This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases the total register count by an additional 50 percent. 2 ...
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... Altera Product Catalog 2011 www.altera.com • • 11 ...
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... Number indicates available user I/O pins. 288 Vertical migration (same GND, ISP, and input pins). User I/Os may be less than labelled for vertical migration. Stratix series devices are offered in commercial and industrial temperatures and RoHS-compliant packages. 12 Altera Product Catalog 2011 www.altera.com • • ...
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... Altera Product Catalog 2011 www.altera.com • • Devices 904 904 904 13 ...
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... Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. Stratix series devices are offered in commercial and industrial temperatures and RoHS-compliant packages. Stratix IV GT devices are only offered in industrial temperatures (0˚ to 100˚). 14 Altera Product Catalog 2011 www.altera.com • ...
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... HSTL (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II) 184 236 280 28/28 44/44 88/ 8/0 16/8 24/ DDR3, DDR2, DDR, QDR II, RLDRAM II, SDR Altera Product Catalog Devices HardCopy IV ASIC Features HC4E25 HC4E35 9.4M 15M 353,600 813,050 864 1,320 32 48 12,384 18,792 1,288 ...
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... LVDS channels, 1,250 Mbps (receive/transmit) Embedded DPA circuitry Series and differential OCT Memory devices supported Implemented in HCells. 1 Since all HardCopy ASICs contain hard-wired logic, they are inherently secure Altera Product Catalog 2011 www.altera.com • • HardCopy III ASICs (0.9 V) HC325 7.0M 338,000 864 ...
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... HardCopy II ASIC Features HC220 HC230 HC240 1.9M 2.9M 3.6M 132,540 179,400 179,400 408 614 2 6 2,988 6,219 8,640 252 384 4/32 8/64 12/88 3 EP2S60 EP2S90 EP2S90 EP2S130 EP2S180 EP2S130 EP2S180 30/29 46/44 116/116 3 3 Altera Product Catalog 2011 www.altera.com • • 768 9 384 17 ...
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... LF = Cost-optimized flip chip Performance-optimized flip chip. 4 636 Number indicates available user I/O pins. All HardCopy series devices are offered in commercial and industrial temperatures and RoHS-compliant packages. 18 Altera Product Catalog 2011 www.altera.com • • HardCopy IV ASICs (0.9 V), 6.5-Gbps Transceivers FBGA (F) 780 (LF ) 780 (FF) ...
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... TBD TBD TBD TBD 3 2 120 160 160 152 Altera Product Catalog 2011 www.altera.com • • Devices 5AGXB7 186,792 495,000 747,170 2,324 3,087 23,800 1,139 16/64 TBD 152 ...
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... Maximum LVDS channels, transceiver channels, PLLs, and PCIe hard IP blocks for the product line shown.Various packages offer a variety of options to meet your design needs. 1 3.3-V compliant, requires a 3.0-V power supply 2 20 Altera Product Catalog 2011 www.altera.com • • Arria V GT FPGAs (1 ...
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... PCIe hard IP block Gen1 Memory devices supported This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases total register count by an additional 50 percent. 1 See supported protocols and data rates on page 63 Arria II GX FPGAs (0.9 V 6.375-Gbps Transceivers ...
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... LVDS channels (receive/transmit) Embedded DPA circuitry Series and differential OCT Transceiver (SERDES) channels, 6.375 Gbps PCIe hard IP block (value as 1.1, 2.0, etc) Memory devices supported 22 Altera Product Catalog 2011 www.altera.com • • Arria II GZ FPGAs (0.9 V 6.375-Gbps Transceivers EP2AGZ225 EP2AGZ300 89,600 ...
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... Devices 1,152 pin 1,517 pin (mm (mm) 1.0-mm pitch 1.0-mm pitch 544 24 544 24 544 704 24 24 544 704 24 24 528 668 24 36 528 668 24 36 504 656 16+4 18+4 488 616 18+6 24+6 Altera Product Catalog 2011 www.altera.com • • 23 ...
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... Values on top indicate available user I/O pins; values at the bottom indicate transceiver count. 12 Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. 24 Altera Product Catalog 2011 www.altera.com • ...
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... ALMs can be configured as MLABs 132 – 1.1, 1.2, 1.5, 1.8, 2.5, 3.3 100 100 DDR3, DDR2, DDR, LPDDR, LPDDR2 Altera Product Catalog Devices 5CEB5 5CEB9 150,000 300,000 6,160 12,760 220 406 2 2 122 122 2011 www ...
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... SSTL-2 (I and II), 1.2-V HSTL (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II), HiSpi, SLVS, Sub-LVDS LVDS channels (875 Mbps receive, 840 Mbps transmit) Transceiver (SERDES) channels Memory devices supported 26 Altera Product Catalog 2011 www.altera.com • • Cyclone V GX FPGAs (1.1 V), 3.125-Gbps Transceivers 5CGXC4 ...
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... SSTL-18 (I and II), SSTL-2 (I and II), 1.2-V HSTL (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II), HiSpi, SLVS, Sub-LVDS 100 122 6 9 DDR3, DDR2, DDR, LPDDR, LPDDR2 Altera Product Catalog Devices Cyclone V GT FPGA Features 5CGTD8 300,000 12,760 8 16 ...
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... Maximum LVDS channels, transceiver channels, PLLs, and PCIe hard IP blocks for the product line shown. Various packages offer a variety options to meet your design needs Transceiver performance varies by product line and package offering. EP4CGX30 supports 3.125 Gbps only in F484 package option Altera Product Catalog 2011 www.altera.com • • Cyclone IV GX FPGAs (1.2 V) EP4CGX22 ...
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... DDR2, DDR, QDR II, RLDRAM II, SDR Altera Product Catalog Devices Cyclone IV E FPGA Features EP4CE55 EP4CE75 EP4CE115 55,856 75,408 114,480 260 305 432 2,340 2,745 3,888 ...
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... I/O standards supported Emulated LVDS channels, 66 840 Mbps Series and differential OCT Memory device supported Not all packages are supported in all speed grades Altera Product Catalog 2011 www.altera.com • • Cyclone III FPGAs (1.2 V) EP3C10 EP3C16 EP3C25 10,320 15,408 24,624 ...
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... SSTL-2 (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II), PCI, PCI-X 1.0, LVTTL, LVCMOS 169 3 QDR II, DDR2, DDR, SDR Devices Cyclone III LS FPGA Features EP3CLS150 EP3CLS200 150,848 198,464 666 891 5,994 8,019 320 396 50.6 50.6 Altera Product Catalog 2011 www.altera.com • • 31 ...
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... Values on top indicate available user I/O pins; values at the bottom indicate the 3.125-Gbps or 5G transceiver count. 12 Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. 32 Altera Product Catalog 2011 www.altera.com • ...
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... MBGA (M) UBGA (U) 164 pin 265 pin 484 pin (mm (mm (mm) 0.5-mm pitch 0.8-mm pitch 0.8-mm pitch 179 179 74 165 153 328 324 292 Altera Product Catalog 2011 www.altera.com • • Devices ...
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... Number indicates available user I/O pins. Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. 34 Altera Product Catalog 2011 www.altera.com • • Cyclone III FPGAs (1.2 V) ...
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... Yes Yes Yes 1.2, 1.5, 1.8, 2.5, 3.3, 5 114 159 271 3 Yes Yes Yes - - Altera Product Catalog 2011 www.altera.com • • 2210 1700 7.0 Yes 4 4 271 Yes ...
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... Programmable slew rate Programmable pull-up resistors Programmable ground pins Open-drain outputs Bus hold Typical equivalent macrocells external resistor must be used for a 5-V tolerance Altera Product Catalog 2011 www.altera.com • • MAX II CPLDs (3.3 V, 2.5 V, 1.8 V) EPM240/Z EPM570/Z 192 440 4.7, 7.5 5 ...
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... Maximum output enables 6 LVTTL/LVCMOS Programmable slew rate Open-drain outputs MAX 3000A CPLD Features MAX 3000A CPLDs (3.3 V) EPM3064A EPM3128A EPM3256A 64 128 80 160 4.5, 7.5, 10 5.0, 7. 2.5, 3.3, 5 Altera Product Catalog Devices EPM3512A 256 512 320 640 7. 2011 www.altera.com 37 • • ...
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... EPM3032A 34 EPM3064A 34 EPM3128A EPM3256A EPM3512A For temperature grades of specific packages (commercial, industrial, or extended temperatures), refer to Altera’s online selector guide Enhanced quad flat pack Thin quad flat pack 3 4 Micro FineLine BGA (0.5 mm) Plastic J-lead chip carrier ...
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... Transceiver toolkit (Transceiver interface and verification tool) Windows/Linux 32-bit support Windows/Linux 64-bit support Lowest density devices for Arria II and Stratix series FPGAs may be included in Web Edition. 1 Requires additional license. 2 Available with talkback feature enabled in Web Edition. 3 Quartus II Design Flow Quartus II Key Features ...
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... Pin planner Eases the process of assigning and managing pin assignments for high-density and high pin-count designs. Automates adding, parameterizing, and linking IP cores—including embedded processors, coprocessors, SOPC Builder peripherals, memories, and user-defined logic. Lets you construct your system-level design using IP cores from Altera’s megafunction library and from Off-the-shelf IP cores Altera’ ...
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... Purchase Quartus II software and increase your productivity today. Pricing $2,995 (SW-QUARTUS-SE-FIX) Renewal $2,495 (SWR-QUARTUS-SE-FIX) $3,995 (SW-QUARTUS-SE-FLT) Renewal $2,495 (SWR-QUARTUS-SE-FLT) Add seat $3,995 (SW-QUARTUS-SE-ADD) ModelSim-Altera Edition $945 (SW-MODELSIM-AE) Renewal $945 (SWR-MODELSIM-AE) ModelSim-Altera Starter Edition Free Description Fixed-node license: Subscription for one year—Windows only Floating-node license: Subscription for one year— ...
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... Embedded Processing Embedded Portfolio Altera’s FPGA and HardCopy ASIC devices are increasingly being adopted for custom system-on-chip (SOC) applications. Altera offers the industry’s broadest selection of soft processors, software development tools, OS support, and embedded IP cores. All of these elements support a single FPGA design flow based on Quartus II design software. ...
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... Nios II Software Build Tools for Eclipse for editing, compiling, debugging, and programming flash devices. The Nios II EDS automatically generates a BSP for your software application by adding C libraries and device drivers for 1 Altera-provided peripheral IP. The BSP editor provides full control over your build options board support package management ...
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... When you’re ready to ship your product, you’ll need the Nios II core license. This royalty-free license never expires and allows you to target your processor design on any Altera FPGA. The Embedded IP Suite is a value bundle that contains licenses of the Nios II processor IP core, DDR1/2 Memory Controller IP core, Triple Speed Ethernet (TSE) MAC IP core, and the NicheStack TCP/IP Network Stack, Nios II Edition software ...
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... Transform (IDWT) V-by-One HS Bitec DisplayPort Receiver Bitec H.264 Main/ EyeLytics Baseline Profile Encoder Video LVDS Serializer/Deserializer Microtronix (SERDES) Transmitter/Receiver Additional Functions Floating-point Addition/ Altera Subtraction Floating-point Multiplication Altera Floating-point Division Altera Floating-point Square Root Altera Floating-point Compare Altera Floating Point Arithmetic Unit ...
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... Intellectual Property Altera and Partner Functions Product Name Vendor Name 32-/16-bit Nios II Embedded Processor Altera 1 ARM Cortex-M1 Arrow Electronics/ARM 1 V1 ColdFire Freescale 1 C68000 AHB Microprocessor CAST, Inc. C68000 Microprocessor CAST, Inc. C80186EC Microprocessor CAST, Inc. C80186XL Microprocessor CAST, Inc. 8-bit CZ80CPU Processor CAST, Inc ...
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... Altera 1 32-bit PCI Bus Master/ Eureka Technology, Inc. Target Interface 1 SOPC Builder-ready licensed core. 1 Intellectual Property Altera and Partner Functions Product Name Vendor Name 32-bit PCI Host Bridge Eureka Technology, Inc. 64-bit PCI Bus Master/ Eureka Technology, Inc. Target Interface 1 64-bit PCI Host Bridge Eureka Technology, Inc ...
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... Intellectual Property Altera and Partner Functions Product Name Vendor Name USB High-speed OTG Multi-point CAST, Inc. USB 1.1 Host/Device Microtronix USB 3.0 SuperSpeed PLDA Device Controller USB 3.0 SuperSpeed SLS Corp Device Controller USB 1.1 Host/Device Microtronix SDIO/SD Memory/ Eureka Technology, Inc. ...
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... SRAM SSRAM (Cypress CY7C1380C) Altera 1 QDR II / II+ Controller Altera supporting UniPHY QDR II SRAM Controller Altera supporting ALTMEMPHY SOPC Builder component (no license required). 1 SOPC Builder-ready licensed core. 2 Intellectual Property Intellectual Property Altera and Partner Functions Altera Product Catalog 2011 www.altera.com • • 49 ...
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... Development Kits Altera and Partner Development Kits The following is a list of Altera and partner development kits. To get the full story, check out our online selector guide. Product and Vendor Name DSP Development Kit, Cyclone III Edition Altera Cyclone III Video and Image Processing ...
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... Gbps. It also provides DDR2 SDRAM, as well as 128 MB of flash memory for booting the FPGAs and DSP devices. This Arria II GX audio and video development kit combines Altera’s proven Arria II GX FPGA-based development hardware and associated IP with OmniTek’s ...
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... QDR II SRAM ( MB). Includes IP support for Serial RapidIO, PCIe, GbE, 10G Ethernet (XAUI), CPRI, and OBSAI interfaces. This board is based on Altera’s Stratix II GX FPGA and is a full-size, single-width AdvancedMC that can be attached to AdvancedTCA carriers or other cards equipped with AdvancedMC bays, and used in MicroTCA Stratix II GX EP2SGX130 systems ...
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... PCIe Gen1. This kit provides a complete hardware and software environment for Arria GX Altera Arria GX FPGAs built around a PCI form factor card compliant EP1AGX60DF780C6 with PCI-SIG and targets the development of designs using PCIe Gen1. This kit provides a low-cost platform for developing transceiver I/O-based FPGA designs ...
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... VHDCI connector supports 28 transmit and 28 receive LVDS links sourced from the FPGA (and 2 clock signals for each transmit and receive Arria GX EP1AGX60 connector). Additional features include two 512 Kb x36 synchronous SRAMs, an IPMI 1.5-compliant Module Management Controller (MMC), a 32-Mb serial flash memory, two onboard temperature sensors, USB communication and debug interface, and a 32-bit Mictor debug connector ...
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... I DVI output connector and mini-DIN output connector are provided. This daughtercard interfaces a HDMI receiver and transmitter to your Altera FPGA development kit using the HSMC expansion connector. The receiver also supports an analog component video (YCbCr) interface. The Daughtercard card uses the Analog Device AD9889 HDMI Transmitter and AD9880 HDMI Receiver to support HDTV formats up to 1080p ...
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... This kit includes a small hardware board with a 24-bit RAMDAC, VGA Daughtercard connector, stereo audio connector, and two PS/2 connectors. This inexpensive module allows the addition of compact flash cards to Daughtercard the Microtronix Product Starter Kit development board system. This platform uses the low-power Altera Cyclone III FPGAs and MAX IIG Cyclone III EP3C25 CPLDs ...
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... The Arrow BeMicro SDK enables a quick and easy evaluation of soft core processors by both embedded software developers and hardware engineers. The kit builds on the success of the original BeMicro evaluation kit by adding features such as mobile DDR memory, Ethernet, Cyclone IV E and even the option of using a file system by slotting in a micro-SD EP4CE22F17C7N card ...
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... It contains the Stratix II GX EP2SGX90 (speed grades EP2SGX90EF1152C3N -5, -4, or -3) and can emulate over 600K gates. One DDR2 SDRAM SODIMM is provided, allowing the FPGA to address memory. This kit allows rapid and early development of designs for high-performance Stratix IV FPGAs. The development board provides general I/Os that connect to onboard switches and indicators, and to the included two-line LCD and 128 x 64-pixel graphics display ...
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... This is a MAX 3000/MAX 7000 starter kit which includes EPM7160S downloading and programming hardware. This is a low-cost MAX 3000A CPLD development board with MAX 128 macrocells that provides an easy entry point into Altera’s EPM3128A CPLD technology. MAX This is a 5.2-megapixel camera daughtercard with selectable frame EPM3256A rates and resolutions ...
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... Cyclone IV E EP4CE115 FPGA. The DE2-115 offers an optimal balance of low cost, low power and a rich supply of logic, Cyclone IV E EP4CE115 memory and DSP capabilities, as well as interfaces to support mainstream protocols including GbE. A HSMC connector is provided to support additional functionality and connectivity via HSMC daughtercards and cables. ...
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... The HSMC power pins are Daughtercard accessed via fuses for added security. The main prototype matrix comprises a 0.1” grid interleaved with +3.3-V and GND access points. Footprints for commonly used 25-way and 9-way D-type connectors are included on the board ...
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... Online classes are free and can be taken at any time. • Instructor-led training, typically lasting one to two days, involves in-person instruction with hands-on exercises from an Altera or Altera partner subject matter expert. Fees vary. • Virtual classrooms, involving live instructor-taught training over the Web, allow you to benefit from the interactivity with an instructor from the comfort of your home or office ...
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... Altera Product Catalog 2011 www.altera.com • • 2. 3.125 - - 1. ...
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... OC-48/OC-192 2.488, 9.953 2.488, 9.953 SPAUI 3.125, 6.25 3.125, 6.25 V-by-One - 64 Altera Product Catalog 2011 www.altera.com • • Protocols, Devices, and Data Rates Stratix IV GX Stratix II GX Data Rates Data Rates (Gbps per Lane) (Gbps per Lane) ...
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... Altera’s serial configuration devices store the configuration file for our SRAM-based FPGAs. We designed our serial configuration devices to minimize cost and board space while providing a dedicated FPGA configuration solution. Serial configuration devices are recommended for new designs. For information on additional configuration devices supporting older products, see our Configuration Handbook. ...
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... EPM: MAX 3000A Device Type 3032A, 3064A, 3128A, 3256A, 3512A Package Type F: FineLine BGA (FBGA) L: Plastic J-lead chip carrier (PLCC) Q: Plastic quad flat pack (PQFP) T: Thin quad flat pack (TQFP) 66 Altera Product Catalog 2011 www.altera.com • • 3032A F C 256 -10 Number of pins for devices with ...
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... F45 U: Ultra FineLine BGA Product-line Suffix For MAX II devices only Indicates device core voltage G: 1.8V V Blank: 2. zero power device Altera Product Catalog Reference Ordering Codes N Optional Suffix Indicates specific device options or shipment method ES: Engineering sample N: RoHS compliant ...
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... For GX/GS FPGAs only 1 at 14.1 Gbps 2 at 12.5 Gbps 3 at 8.5 Gbps For GT FPGAs only 2 at 28.0 Gbps Package Type 3 at 25.0 Gbps 4 at 20.0 Gbps F: Fineline BGA H: Hybrid Fineline BGA 68 Altera Product Catalog 2011 www.altera.com • • Pin count code 3 ...
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... Cool Value You.won’t.fi . nd.a.better.CPLD.value.than.in. MAX .V.CPLDs..With.a.unique,.non-volatile. ® architecture.and.one.of.the.largest.density.CPLDs. on.the.market,.the.MAX.V.family.gives.you: •.Lower.total.system.cost •.Up.to.50.percent.lower.total.power.vs.. . competitive.CPLDs •.Robust.new.features And.with.Altera,.you.know.you’ll.get.devices.in. volume.when.you.need.them.. How.can.you.resist.such.a.value? MAX V CPLDs: Cool Value www.altera.com/maxv ...
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... Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera ...