JN5139/001,515 NXP Semiconductors, JN5139/001,515 Datasheet - Page 30
JN5139/001,515
Manufacturer Part Number
JN5139/001,515
Description
IC MCU 32BIT 56QFN
Manufacturer
NXP Semiconductors
Datasheet
1.JN5139-Z01-V.pdf
(82 pages)
Specifications of JN5139/001,515
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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- Download datasheet (619Kb)
Throughout a sleep cycle the direction of the DIO, and the state of the outputs, is held. This is based on the resultant
of the GPIO Data/ Direction registers and the effect of any enabled peripherals at the point of entering sleep.
Following a wake-up these directions and output values are maintained under control of the GPIO data / direction
registers. Any peripherals enabled before the sleep cycle are not automatically re-enabled, this must be done through
software after the wake-up.
For example, if DIO0 is configured to be SPISEL1 then it becomes an output. The output value is controlled by the
SPI functional block. If the device then enters a sleep cycle, the DIO will remain an output and hold the value being
output when entering sleep. After wake-up the DIO will still be an output with the same value but controlled from the
GPIO Data/Direction registers. It can be altered with the software functions that adjust the DIO, or the application may
re-configure it to be SPISEL1.
Unused DIO pins are recommended to be set as inputs with the pull-up enabled.
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JN-DS-JN5139 1v9
© NXP Laboratories UK 2010
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