PN5120A0HN1/C2,157 NXP Semiconductors, PN5120A0HN1/C2,157 Datasheet - Page 8
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PN5120A0HN1/C2,157
Manufacturer Part Number
PN5120A0HN1/C2,157
Description
IC TRANSMISSION MOD 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.PN5120A0HN1C2118.pdf
(125 pages)
Specifications of PN5120A0HN1/C2,157
Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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NXP Semiconductors
Table 3.
PN512
Product data sheet
COMPANY PUBLIC
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 to 31
32
Pin description HVQFN32
Symbol
A1
PVDD
DVDD
DVSS
PVSS
NRSTPD
SIGIN
SIGOUT
SVDD
TVSS
TX1
TVDD
TX2
TVSS
AVDD
VMID
RX
AVSS
AUX1
AUX2
OSCIN
OSCOUT
IRQ
ALE
D1 to D7
A0
7.2 Pin description
Type
I
PWR
PWR
PWR
PWR
I
I
O
PWR
PWR
O
PWR
O
PWR
PWR
PWR
I
PWR
O
O
I
O
O
I
I/O
I
Description
Address Line
Pad power supply
Digital Power Supply
Digital Ground
Pad power supply ground
Not Reset and Power Down: When LOW, internal current sinks are switched off, the
oscillator is inhibited, and the input pads are disconnected from the outside world. With
a positive edge on this pin the internal reset phase starts.
Communication Interface Input: accepts a digital, serial data stream
Communication Interface Output: delivers a serial data stream
S2C Pad Power Supply: provides power to the S
Transmitter Ground: supplies the output stage of TX1 and TX2
Transmitter 1: delivers the modulated 13.56 MHz energy carrier
Transmitter Power Supply: supplies the output stage of TX1 and TX2
Transmitter 2: delivers the modulated 13.56 MHz energy carrier
Transmitter Ground: supplies the output stage of TX1 and TX2
Analog Power Supply
Internal Reference Voltage: This pin delivers the internal reference voltage.
Receiver Input
Analog Ground
Auxiliary Outputs: These pins are used for testing.
Crystal Oscillator Input: input to the inverting amplifier of the oscillator. This pin is
also the input for an externally generated clock (f
Crystal Oscillator Output: Output of the inverting amplifier of the oscillator.
Interrupt Request: output to signal an interrupt event
Address Latch Enable: signal to latch AD0 to AD5 into the internal address latch
when HIGH.
8-bit Bi-directional Data Bus.
Remark: An 8-bit parallel interface is not available.
Remark: If the host controller selects I
can be used to define the I
Remark: For serial interfaces this pins can be used for test signals or I/Os.
Address Line
All information provided in this document is subject to legal disclaimers.
Rev. 3.6 — 10 March 2011
111336
2
C address.
2
C as digital host controller interface, these pins
osc
2
C pads
= 27.12 MHz).
Transmission module
© NXP B.V. 2011. All rights reserved.
PN512
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