MAX8795AGCJ/V+T Maxim Integrated Products, MAX8795AGCJ/V+T Datasheet - Page 25

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MAX8795AGCJ/V+T

Manufacturer Part Number
MAX8795AGCJ/V+T
Description
Display Drivers TFT-LCD DC-DC Conver ter with Operational
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8795AGCJ/V+T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The largest portions of power dissipation in the step-up
regulator are the internal MOSFET, the inductor, and the
output diode. If the step-up regulator has 90% efficiency,
approximately 3% to 5% of the power is lost in the internal
MOSFET, approximately 3% to 4% in the inductor, and
approximately 1% in the output diode. The remaining 1%
to 3% is distributed among the input and output capacitors
and the PCB traces. If the input power is about 5W, the
power lost in the internal MOSFET is approximately 150mW
to 250mW.
The power dissipated in the operational amplifiers
depends on their output current, the output voltage,
and the supply voltage:
where I
the operational amplifier, and I
current that the operational amplifier sinks.
In a typical case where the supply voltage is 13V and
the output voltage is 6V with an output source current
of 30mA, the power dissipated is 180mW.
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
• Minimize the area of high-current loops by placing
the inductor, the output diode, and the output
capacitors near the input capacitors and near the
LX and PGND pins. The high-current input loop
goes from the positive terminal of the input capacitor
to the inductor, to the IC’s LX pin, out of PGND, and
to the input capacitor’s negative terminal. The high-
current output loop is from the positive terminal of
the input capacitor to the inductor, to the output
diode (D1), and to the positive terminal of the output
capacitors, reconnecting between the output capac-
itor and input capacitor ground terminals. Connect
these loop components with short, wide connec-
tions. Avoid using vias in the high-current paths. If
vias are unavoidable, use many vias in parallel to
reduce resistance and inductance.
PD
OUT_(SOURCE)
SOURCE
PD
SINK
=
______________________________________________________________________________________
I
OUT SOURCE
PCB Layout and Grounding
=
is the output current sourced by
I
_(
OUT SINK
_(
OUT_(SINK)
Operational Amplifier
)
)
×
×
(
Step-Up Regulator
V
V
SUP
OUT
TFT-LCD DC-DC Converter with
_
is the output
V
OUT
_
)
• Create a power-ground island (PGND) consisting of
• Place all feedback voltage-divider resistors within
• Place the IN pin and REF pin bypass capacitors as
• Minimize the length and maximize the width of the
• Minimize the size of the LX node while keeping it
Refer to the MAX8795A evaluation kit for an example of
proper PCB layout.
TRANSISTOR COUNT: 6595
PROCESS: BiCMOS
Operational Amplifiers
the input and output capacitor grounds, PGND pin,
and any charge-pump components. Connect all of
these together with short, wide traces or a small
ground plane. Maximizing the width of the power-
ground traces improves efficiency and reduces out-
put voltage ripple and noise spikes. Create an
analog ground plane (AGND) consisting of the
AGND pin, all the feedback-divider ground connec-
tions, the operational-amplifier divider ground con-
nections, the COMP and DEL capacitor ground
connections, and the device’s exposed backside
paddle. Connect the AGND and PGND islands by
connecting the PGND pin directly to the exposed
backside paddle. Make no other connections
between these separate ground planes.
5mm of their respective feedback pins. The divider’s
center trace should be kept short. Placing the resis-
tors far away causes their FB traces to become
antennas that can pick up switching noise. Take
care to avoid running any feedback trace near LX or
the switching nodes in the charge pumps, or pro-
vide a ground shield.
close as possible to the device. The ground connec-
tion of the IN bypass capacitor should be connected
directly to the AGND pin with a wide trace.
traces between the output capacitors and the load
for best transient responses.
wide and short. Keep the LX node away from feed-
back nodes (FB, FBP, and FBN) and analog ground.
Use DC traces to shield if necessary.
Chip Information
25

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