MAX8728ETJ+T Maxim Integrated Products, MAX8728ETJ+T Datasheet - Page 20

• Manufacturer Part Number: MAX8728ETJ+T
• Description: Display Drivers Low-Cost Multiple-Ou tput Power Supply fo
• Manufacturer: Maxim Integrated Products

Specifications of MAX8728ETJ+T

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Low-Cost, Multiple-Output
Power Supply for LCD Monitors/TVs
turns off and Q2 turns on, connecting GON to DRN.
GON can then be discharged through a resistor con-
nected between DRN and GND or AV
and stops discharging GON when V
times the voltage on THR.
When V
block works in the second mode. The rising edge of
V
SRC. An internal n-channel MOSFET Q3 between
MODE and GND is also turned on to discharge an
external capacitor between MODE and GND. The
falling edge of VCTL turns off Q3, and an internal 50µA
current source starts charging the MODE capacitor.
Once V
block turns off Q1 and turns on Q2, connecting GON to
DRN. GON can then be discharged through a resistor
connected between DRN and GND or AV
off and stops discharging GON when V
times the voltage on THR.
When the LCD is shut down or in a fault state, the
switch control block is disabled, DZL is held low, and
GON is discharged to GND through an internal 4mA
current source. If the DRN resistor connects DRN to
AV
diode conducts. To prevent the body diode conduc-
tion, an external diode must be added in series with the
DRN resistor (D6 in Figure 1). During startup, the 4mA
current source and Q4 are released when GATE reach-
es the GATE DONE threshold.
The MAX8728 includes an internal linear regulator. INL
is the input of the linear regulator. The input voltage
range is between 7V and 13.2V. The output voltage is
set to 5V. The regulator powers the internal MOSFET
drivers, PWM controllers, charge-pump regulators, and
logic circuitry. The total external load capability is
25mA. Bypass VL to GND with a minimum 1µF ceramic
capacitor.
The reference output is nominally 2V, and can
source at least 50µA (see the Typical Operating
Characteristics section). V
reference block. Bypass REF with a 0.22µF ceramic
capacitor connected between REF and GND.
The step-down regulator and step-up regulator use the
same internal oscillator. The FSEL input selects the
switching frequency. Table 3 shows the switching fre-
quency based on the FSEL connection. High-frequency
(1.5MHz) operation optimizes the application for the
20
CTL
DD
______________________________________________________________________________________
turns on Q1 and turns off Q2, connecting GON to
or another voltage above ground, the Q2 body
MODE
MODE
is less than 0.9 x V
exceeds 0.5 x V
Frequency Selection (FSEL)
Reference Voltage (REF)
CC
Linear Regulator (VL)
is the input of the internal
REF
REF
, the switch control
, the switch control
GON
DD
GON
. Q2 turns off
DD
reaches 10
reaches 10
. Q2 turns
Table 3. Frequency Selection
smallest component size, trading off efficiency due to
higher switching losses. Low-frequency (500kHz) oper-
ation offers the best overall efficiency at the expense of
component size and board space.
To reduce the input RMS current, the step-down regu-
lator and the step-up regulator operate 180° out of
phase from each other. The feature allows the use of
less input capacitance.
The step-down regulator starts up when the MAX8728’s
internal reference voltage (REF) is above its undervolt-
age lockout (UVLO) threshold and SHDN is logic high.
The FB1 fault-detection circuit is enabled after the step-
down regulator reaches regulation. The negative
charge-pump regulator starts up when both EN and
SHDN are logic high and REF is above its UVLO thresh-
old. Once the negative charge-pump regulator output is
in regulation, the MAX8728 enables the FBN fault-detec-
tion circuit and the input-switch control block, which starts
pulling down GATE with a 11µA internal current source.
The external p-channel MOSFET turns on and connects
the input supply to the step-up regulator when V
falls below the turn-on threshold of the MOSFET.
When V
MAX8728 enables the step-up regulator and the posi-
tive charge-pump adjustable delay block. The FB2
fault-detection circuit is enabled after the step-up regu-
lator reaches regulation. The delay block charges the
DEL capacitor with an internal 5µA current source and
V
MAX8728 enables the positive charge-pump regulator
and the high-voltage switch control block. The FBP fault
detection is enabled after the positive charge-pump
regulator reaches regulation.
The MAX8728 disables the step-up regulator, positive
charge-pump regulator, negative charge-pump regula-
tor, input switch control block, delay block, and high-
voltage switch control block when EN or SHDN is logic
low, or when any fault latch is set. The step-down regu-
lator is disabled only when SHDN is logic low, the step-
down fault latch is set, or during thermal overload.
DEL
rises linearly. When V
GATE
FSEL
GND
VCC
REF
reaches the GATE DONE threshold, the
SWITCHING FREQUENCY (kHz)
DEL
Power-Down Control
Power-Up Sequence
exceeds 1V (typ), the
1500
1000
500
GATE