MAX8729EEI+T Maxim Integrated Products, MAX8729EEI+T Datasheet - Page 19

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MAX8729EEI+T

Manufacturer Part Number
MAX8729EEI+T
Description
Display Drivers Constant-Frequency H alf-Bridge CCFL Inve
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8729EEI+T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 1 Phase Shift Setting
X = Don’t care.
the slave IC. To synchronize the DPWM frequency,
connect the LFCK pins of the slave IC and master IC
together, and connect the DPWM pin of the master IC
to the LF pin of the slave IC. The CNTL brightness con-
trol is disabled in the slave mode. The master directly
controls the brightness setting of the slave by providing
a dimming signal on its DPWM pin.
The MAX8729 has the capability to adjust the phase of
the gate drivers and the DPWM oscillator. The phase-
shift function significantly reduces the input RMS ripple
current and lowers the input capacitor requirement. The
phase shift can be easily programmed using two logic
input pins (PS1 and PS2). These two pins combined
together give four choices of phase shift: 72°, 90°, 120°,
and 180°. The selection of the phase shift is based on
the number of MAX8729s used in the daisy-chain.
Table 1 gives the suggested selection of phase shift for
1, 2, 3, 4, and 5 phases. For a given multiphase circuit,
all master and slave ICs should use the same setting
for PS1, PS2.
Table 2 summarizes the MAX8729’s operation in
all modes.
GND
GND
PS2
V
V
PIN SETTING
X
CC
CC
Phase Shift in Daisy-Chain Operation
GND
GND
PS1
V
V
X
CC
CC
______________________________________________________________________________________
Constant-Frequency, Half-Bridge CCFL
MASTER
0
0
0
0
0
SLAVE 1
(PS1, PS2)
N/A
180
120
90
72
PHASE SHIFT IN DEGREES
SLAVE 2
N/A
N/A
240
180
144
The internal linear regulator steps down the DC input volt-
age to 5.35V (typ). The linear regulator supplies power to
the internal control circuitry of the MAX8729. V
used to power the MOSFET gate drivers by connecting it
to V
The V
The MAX8729 includes an undervoltage lockout
(UVLO) circuit. The UVLO circuit monitors the V
age. When V
ables both high-side and low-side gate drivers and
resets the fault latch.
When the MAX8729 is placed in shutdown, all functions
of the IC are turned off except for the 5.3V linear regu-
lator. In shutdown, the linear regulator output voltage
drops to about 4.5V and the supply current is 6µA (typ).
While in shutdown, the fault latch is reset. The device
can be placed into shutdown by pulling SHDN to its
logic low level.
DD
CC
. V
voltage drops to 4.5V in shutdown.
DD
SLAVE 3
Inverter Controller
N/A
N/A
N/A
270
216
can also be driven from an external supply.
CC
Linear Regulator Output (V
is below 4.2V (typ), the MAX8729 dis-
SLAVE 4
N/A
N/A
N/A
288
Low-Power Shutdown
NA
PHASES
NO. OF
CC
1
2
3
4
5
CC
UVLO
can be
volt-
CC
19
)

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