MAX6961ATH-T Maxim Integrated Products, MAX6961ATH-T Datasheet - Page 12
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MAX6961ATH-T
Manufacturer Part Number
MAX6961ATH-T
Description
LED Drivers
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX6963ATH.pdf
(35 pages)
Specifications of MAX6961ATH-T
Number Of Segments
64
Low Level Output Current
750 mA
High Level Output Current
48 mA
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Supply Current
9 mA
Maximum Power Dissipation
2162 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TQFN-44
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
Figure 5. Timing Diagram
Twenty-four-bit transmissions are read/write, address-
and-data accesses to the MAX6960’s display memory
(Figure 8). This is direct access to display memory
because the memory address is included in the 24-bit
transmission, compared with an 8-bit transmission,
which uses the memory address stored in the global
display indirect address register. Twenty-four-bit trans-
missions provide the random-access method of updat-
ing a plane of display memory of the MAX6960. It is the
most suitable display update method if the host system
builds an image directly in a display memory plane,
rather than in host local memory.
The MAX6960 communicates to the host through a 4-
wire serial interface. The interface has three inputs:
clock (CLK), chip select (CS), and data in (DIN), and
one output, data out (DOUT). CS must be low to clock
data into the device, and DIN must be stable when
sampled on the rising edge of CLK. DOUT is used for
read access, and is stable on the rising edge of CLK.
DOUT is high impedance except during MAX6960 read
accesses. Multiple MAX6960s may be connected to the
same 4-wire interface, with all devices connected to all
four interface lines in parallel. The normal limit of paral-
leled MAX6960s is 256, because that is the intercon-
nection limit for the 3-wire interface and associated
device addressing. The Applications Information sec-
tion discusses some practical issues raised by driving
many devices in parallel from the same interface.
The serial interface responds to only 8-bit, 16-bit, and
24-bit commands (Table 7).
12
DOUT
CLK
______________________________________________________________________________________
DIN
CS
Host 4-Wire Serial Interface
t
CSS
t
DS
Dn
t
DH
t
CL
24-Bit Transmissions
Dn-1
t
Serial Addressing
CH
D1
t
CP
D0
t
CSH
The MAX6960 ignores any transmission that is not
exactly 8 bits, 16 bits, or 24 bits between the falling
and subsequent rising edge of CS.
Controlling the MAX6960 requires sending an 8-bit, 16-
bit, or 24-bit word. The last byte, D7 through D0, is
always the data byte. Eight-bit accesses are write-only
accesses; 16-bit or 24-bit accesses are read or write
accesses, as determined by the MSB of the transmis-
sion, which is set for a read access; clear for a write. A
16-bit or 24-bit read involves transmitting 16 or 24 bits
to DIN, taking CS high, and then reading back 8 bits
from DOUT. Only one MAX6960’s DOUT is enabled
from tri-state for readback. The selected MAX6960’s
DOUT normally returns to tri-state after the 8th falling
edge of CLK. However if CS falls during the read
before the 8th falling edge of CLK, then the readback is
terminated and the selected MAX6960’s DOUT returns
to tri-state.
If a number of bits other than exactly 8 bits, 16 bits, or
24 bits are clocked into the MAX6960 between taking
CS low and taking CS high again, then that transmis-
sion is ignored.
The MAX6960 is written to using the following
sequence (Figures 3, 4, and 5):
1) Take CLK low.
2) Take CS low.
3) For an 8-bit transmission:
t
DO
Control and Operation Using the 4-Wire Interface
Clock 8 bits of data into DIN, D7 first to D0 last,
observing the setup and hold times.
For a 16-bit transmission:
Clock 16 bits of data into DIN, D15 first to D0 last,
D7
D6
t
CSW
Writing Device Registers
D1
D0
t
DO
t
DO
.