LSP159-601-MOQ-1 Lyrtech, LSP159-601-MOQ-1 Datasheet - Page 2

• Manufacturer Part Number: LSP159-601-MOQ-1
• Description: Data Conversion Modules & Development Tools Hi-spd dual A/D & D/A FMC Module
• Manufacturer: Lyrtech

Specifications of LSP159-601-MOQ-1

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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A PPS signal can be sent to the carrier’s FPGA to
dynamically adjust the ADAC250’s onboard VCXO
through its SPI DAC — something especially useful where
a GPS-disciplined clock is needed to drive sampling clocks.
For details about the GPS-disciplined FPGA core, contact
[e-mail].
Performances
Analog-to-digital converters
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Digital-to-analog converters
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ADAC250 clock management facility block diagram
count FMC
High-pin-
From an external clock or reference connected to the
ADAC250’s front panel
From a clock or reference supplied by the ADAC250’s
carrier FMC
From the ADAC250’s onboard, low-jitter 10 MHz
reference
Analog input bandwidth (–3dB): 470 MHz
Conditions: F
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Analog output bandwidth: 500 MHz
Conditions: F
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CLK 0
CLK 1
CLK 2
DAC data clock in
Full-scale input (dBm):
SNR (dB):
2
3
SFDR (dBc):
Noise floor (dBFS):
THD (dBc):
Power (dBm):
2
3
SFDR (dBc):
Phase noise (10 kHz; –dBc/Hz):
Phase noise (100 kHz; –dBc/Hz):
Phase noise (1 MHz; –dBc/Hz):
ADC clock out
DAC sync
nd
rd
nd
rd
harmonic (dBc):
harmonic (dBc):
harmonic (dBc):
harmonic (dBc):
DAC reference clock out
Level shifter
ADC
DAC
s
FMC reference/clock output
FMC reference/clock input
s
= 250 MSPS, F
70.5
= 1 GSPS, F
–74.0
75.0
72.0
SPI/CTRL
ADC clock
DAC clock
70.0
–21.0–2.5
85.0
58.0
–84.0
CTRL
Out 0
Out 1
Out 3
–81.0
–75.0
–115.0
69.0
63.0
AD9511
65.0
out
CLK 1
CLK 2
Ref in
Out 2
74.0
50.0
11.0
in
(MHz) =
–74.0
–61.0
–57.0
(MHz) =
–91.0
–85.0
–21.0–2.5
–115.0
crosspoint
11.0
switch
4×4
CP
VCO
–52.0
54.0
125.0
110.0
–84.0
–73.0
120.0
30
11.0
30
–109.0
70
External clock/Reference input
External clock/Reference output
–22.0–1.0
0.80–1.55 GHz
70
122.0
Loop lter
108.0
VCO
119.0
150
150
121.0
107.0
119.0
10 MHz VCXO
SPI DAC
Out
In
Specifications
FMC connectivity
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Front panel
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Mechanical
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Standards compliance
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Electrical
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Power consumption
The power consumption below was calculated at
FS
all converters at maximum gain. The ADAC250’s power
consumption will vary according to converter settings.
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Environmental
Contact Lyrtech for details about this specification.
Purchase information
Phone
(1) 418-877-4644
Toll free in the US and Canada: 1-888-922-4644
E-mail
[e-mail]
Visit us on the Web at
Lyrtech products are constantly being improved; therefore, Lyrtech
reserves itself the right to modify the information herein at any time and
without notice. The FMC logo is a trademark of VITA.
Lyrtech Incorporated. All rights reserved.
2010-12-14
ADC
High-pin-count connector
LA (00–33), HA (00–11)
CLK (0–2)
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MMCX connectors
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ADC/DAC/PLL status LED × 4
Dimensions: 69 mm × 10 mm × 84 mm (W×H×D)
Rugged FMC form factor — designed for conduction
cooling, but not tested or implemented. Contact
[e-mail]
VITA 57.1
12 V
3.3 V
V
7 W (maximum)
= 250 MHz, FS
adj
to 2.5 V necessary to power ADAC250 ICs
CLK0, CLK1: M2C clocks
CLK2: C2M clock
ADC and DAC channels A/B
External trigger/PPS
External reference/clock input and output
DAC
for details.
= 1 GHz (4× interpolation), with
www.lyrtech.com.
ADAC250 on Perseus