DLP-2232PB DLP Design Inc, DLP-2232PB Datasheet - Page 8

• Manufacturer Part Number: DLP-2232PB
• Description: Interface Modules & Development Tools 50P-DIP USB-FIFO Module
• Manufacturer: DLP Design Inc

Specifications of DLP-2232PB

• Interface Type: USB
• Data Bus Width: 8 bit
• Operating Supply Voltage: 5 V
• Product: Interface Modules
• For Use With/related Products: 16F877A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TOKEN I/O COMMAND SET
0xA5 – Line In – Reads the state of a single port pin
Parameters:
Returns:
Function:
Example:
0xA6 – Line Out - Sets a single port pin high or low
Parameters:
Returns:
Function:
Example:
0xA7 – Return Board ID
Parameters:
Returns:
Function:
Example:
0xA8 – Setup A/D
Parameters:
Returns:
Function:
Example:
V1.1
Port – Select from available port pins (PIN_A3, PIN_B0, etc)
1 Byte: State of the port pin (0 or 1)
This function will read the state of a single port pin. If the data direction for the
pin selected was set to output, the direction is first set to input.
0x2, 0xA5, 0x2B, 0x8C - Reads the current state of port pin PIN_A3.
Port – Select from available port pins (PIN_A3, PIN_B3, etc)
State – 0 or 1
Undefined
This function will change the output state of a single port pin. If the data direction
for the pin selected was set to input, the direction is first set to output.
0x3, 0xA6, 0x2B, 0x1, 0x8F – Sets port pin PIN_A3 high.
None
6 bytes: “2232PB”
This function will return the ID of the development board currently opened.
0x1, 0xA7, A6 – Reads the board ID.
Port Configuration – Selects analog port configuration. (See command 0xA8 in
the example firmware for options.)
A/D Conversion Clock – Select the source for the A/D conversion clock. (See
command 0xA8 in the example firmware for options.)
Undefined
This function will select the source for the A/D conversion clock. (Refer to the
datasheet for the 16F877A for a detailed explanation of the conversion clock.)
0x3, 0xA8, 0x89, 0x81, 0xA3 – Sets all available A/D inputs on the DLP-2232PB
to analog mode (0x89) and selects Fosc/32 for 20MHz operation (0x81).
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July 2004