530CA40M0000BG Silicon Laboratories Inc, 530CA40M0000BG Datasheet

530CA40M0000BG

Manufacturer Part Number

530CA40M0000BG

Description

SMD CRYSTL OSCILLATOR 40MHZ 3.3V

Manufacturer

Silicon Laboratories Inc

Series

Si530r

Type

Standardr

Datasheet

1.530CA40M0000BG.pdf (10 pages)

Specifications of 530CA40M0000BG

Supply Voltage

3.3V

Frequency

40MHz

Frequency Stability

±50ppm

Operating Temperature

-40°C ~ 85°C

Current - Supply (max)

88mA

Mounting Type

Surface Mount

Size / Dimension

0.276" L x 0.197" W (7.00mm x 5.00mm)

Height

0.065" (1.65mm)

Package / Case

SMD 7.00mm x 5.00mm

Supply Current

81mA

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

Q3854864

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Features

Applications

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

Functional Block Diagram

Preliminary Rev. 0.4 5/06

R Y S TA L

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

jitter performance

3x better frequency stability than

SAW-based oscillators

SONET/SDH

Networking

SD/HD video

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

Z T O

Frequency

Fixed

S C I L L A T O R

1.4 G H

with superior

10–1400 MHz

Synthesis

DSPLL®

Any-rate

Clock

Clock and data recovery

FPGA/ASIC clock generation

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

)

(XO)

CLK–

GND

CLK+

circuitry

R E L I M I N A R Y

S i5 30/ 531

Si530 (LVDS/LVPECL/CML)

Si531 (LVDS/LVPECL/CML)

GND

Ordering Information:

Pin Assignments:

Si530 (CMOS)

See page 6.

See page 5.

Si5602

(Top View)

A TA

CLK–

CLK+

CLK–

CLK+

Si530/531

H E E T

Related parts for 530CA40M0000BG

530CA40M0000BG Summary of contents

Page 1

... The Si530/531 IC based XO is factory configurable for a wide variety of user specifications including frequency, supply voltage, output format, and temperature stability. Specific configurations are factory programmed at time of shipment, thereby eliminating long lead times associated with custom oscillators. Functional Block Diagram V DD 10– ...

Page 2

Si530/531 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter 1 Supply Voltage Supply Current 2 Output Enable (OE) Operating Temperature Range Notes: 1. Selectable parameter specified by part number. See Section 3. "Ordering Information" on page 6 for further ...

Page 3

Table 3. CLK± Output Levels and Symmetry Parameter Symbol 1 LVPECL Output Option LVDS Output Option CML Output Option CMOS Output Option Rise/Fall time ...

Page 4

Si530/531 Table 6. Absolute Maximum Ratings Parameter Supply Voltage Input Voltage (any input pin) Storage Temperature ESD Sensitivity (HBM, per JESD22-A114) Soldering Temperature (Pb-free profile) Soldering Temperature Time @ T Notes: 1. Stresses beyond those listed in Absolute Maximum Ratings ...

Page 5

Pin Descriptions CLK– GND 3 4 CLK+ Si530 LVDS/LVPECL/CML Pin Symbol LVDS/LVPECL/CML Function 1 OE (CMOS only (LVPECL,LVDS clock output disabled (outputs tristated) CML) 3 GND 4 ...

Page 6

Si530/531 3. Ordering Information The Si530/531 XO was designed to support a variety of options including frequency, temperature stability, output format, and V . Specific device configurations are programmed into the Si530/531 at time of shipment. DD Configurations can be ...

Page 7

Outline Diagram and Suggested Pad Layout Figure 2 illustrates the package details for the Si530/531. Table 10 lists the values for the dimensions shown in the illustration. Table 10. Package Diagram Dimensions (mm) Dimension Figure 2. Si530/531 Outline Diagram ...

Page 8

Si530/531 5. 6-Pin PCB Land Pattern Figure 3 illustrates the 6-pin PCB land pattern for the Si530/531. Table 11 lists the values for the dimensions shown in the illustration. Table 11. PCB Land Pattern Dimensions (mm) Dimension ...

Page 9

OCUMENT HANGE Revision 0.3 to Revision 0.4 Updated references from Si530 to Si530/531. Added Table 9, “Pinout for Si531 Series,” on page 5. Updated 3. "Ordering Information" on page 6 to add the Si531 series. Added Table ...

Page 10

... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and DSPLL are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...

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