C8051F015DK Silicon Laboratories Inc, C8051F015DK Datasheet - Page 144

MCU, MPU & DSP Development Tools Dev Kit for F015-19

C8051F015DK

Manufacturer Part Number
C8051F015DK
Description
MCU, MPU & DSP Development Tools Dev Kit for F015-19
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F015DK

Processor To Be Evaluated
C8051F01x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Bits7-6: UNUSED. Read = 00b, Write = don’t care.
Bit5:
Bit4:
Bit3:
Bits2-0: Reserved. Read = 000b, Must Write = 000.
R/W
Bit7
-
T2M: Timer 2 Clock Select.
This bit controls the division of the system clock supplied to Timer 2. This bit is ignored
when the timer is in baud rate generator mode or counter mode (i.e. C/T2 = 1).
0: Timer 2 uses the system clock divided by 12.
1: Timer 2 uses the system clock.
T1M: Timer 1 Clock Select.
This bit controls the division of the system clock supplied to Timer 1.
0: Timer 1 uses the system clock divided by 12.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit controls the division of the system clock supplied to Counter/Timer 0.
0: Counter/Timer uses the system clock divided by 12.
1: Counter/Timer uses the system clock.
R/W
Bit6
-
Figure 19.6. CKCON: Clock Control Register
T2M
R/W
Bit5
T1M
R/W
Bit4
Rev. 1.7
T0M
R/W
Bit3
Reserved
R/W
Bit2
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Reserved
R/W
Bit1
Reserved
R/W
Bit0
SFR Address:
Reset Value
00000000
0x8E
144

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