EWM-900-FDTC-HS Radiotronix, EWM-900-FDTC-HS Datasheet - Page 10

• Manufacturer Part Number: EWM-900-FDTC-HS
• Description: RF Modules & Development Tools Head Set
• Manufacturer: Radiotronix

Specifications of EWM-900-FDTC-HS

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: (HS) EWM-900-FDTC

EWM-900-FDTC Full Duplex Voice/Data Transceiver
Configuration
The transceiver is configured by programming four registers via a three-wire serial interface
comprised of CLK (pin 10), DAT (pin 11), and LE (pin 12).
When LE is high, bits are shifted in from DAT on each rising edge of CLK. The most significant bit
of the most significant byte is shifted in first. Bits 0 and 1 of byte 0 determine which register is
programmed.
Reference Frequency Control Register
The value programmed into this register determines the reference frequency for the transceiver.
For proper operation, the reference frequency MUST be set to 50kHz. The programming word is:
binary: 00000000 01000011 11000000
hex: 0x0043C0
Table 4, Reference Frequency Register
Bits 0 and 1 of byte 0 of all register programming words are the register select bits, as described
in the following table. The reference frequency should be fixed at 50kHz and should not be
changed.
Table 5, Register Address Bits
EWM-900-FDTC Data Sheet
Bit 1
Figure 4, Serial Programming Waveforms.
0
0
1
1
7
1
0
0
Bit 0
0
1
0
1
6
1
1
0
Reference frequency control
RX VCO control
TX VCO control
Mode control
Register
5
0
0
0
Bit Position
4
0
0
0
Page 6
3
0
0
0
2
0
0
0
Each register is either 22 or 23 bits.
For consistency’s sake, 24 bits should
be shifted into the DAT pin to
successfully program a register. When
LE transitions high, the incoming bits
are stored in a shift register until LE
transitions low. On the falling edge of
the transition, the contents of the shift
register
appropriate control register.
are
1
0
1
0
Revision 1.2 - 2/11/2004
transferred
0
0
1
0
Data Sheet
to
Byte
0
1
2
the